LM3S5632 Datasheet, PDF (322/825 Pages) Texas Instruments – Stellaris® LM3S5632 Microcontroller

Micro Direct Memory Access (μDMA)
Register 10: DMA Channel Useburst Set (DMAUSEBURSTSET), offset 0x018
Each bit of the DMAUSEBURSTSET register represents the corresponding DMA channel. Writing
a 1 disables the peripheral's single request input from generating requests, and therefore only the
peripheral's burst request generates requests. Reading the register returns the status of useburst.
When there are fewer items remaining to transfer than the arbitration (burst) size, the controller
automatically clears the useburst bit to 0. This enables the remaining items to transfer using single
requests. This bit should not be set for a peripheral's channel that does not support the burst request
model.
Refer to “Request Types” on page 290 for more details about request types.
Reads
DMA Channel Useburst Set (DMAUSEBURSTSET)
Base 0x400F.F000
Offset 0x018
Type RO, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
SET[n]
Type
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
SET[n]
Type
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:0
Name
SET[n]
Type
R
Reset
0x00
Description
Channel [n] Useburst Status
Returns the useburst status of channel [n].
Value Description
0 Single and Burst
DMA channel [n] responds to single or burst requests.
1 Burst Only
DMA channel [n] responds only to burst requests.
Writes
DMA Channel Useburst Set (DMAUSEBURSTSET)
Base 0x400F.F000
Offset 0x018
Type WO, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
SET[n]
Type
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
SET[n]
Type
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
322
November 17, 2011
Texas Instruments-Production Data