DAC7678_14 Datasheet, PDF (32/53 Pages) Texas Instruments – 12-Bit, Octal-Channel, Ultra-Low Glitch, Voltage Output, Two-Wire Interface Digital-to-Analog Converter with 2.5V Internal Reference

DAC7678
SBAS493A – FEBRUARY 2010 – REVISED AUGUST 2010
www.ti.com
Table 17. Control Matrix for Write Commands (continued)
COMMAND AND ACCESS BYTE
MOST SIGNIFICANT DATA BYTE
C3 C2 C1 C0 A3 A2 A1 A0 DB15 DB14 DB13 DB12 DB11 DB10
Write to Select DAC Input Register and Update All DAC Registers (Global Software LDAC)
0
0
1
0
0
0
0
0
Data[11:4]
0
0
1
0
0
0
0
1
Data[11:4]
0
0
1
0
0
0
1
0
Data[11:4]
0
0
1
0
0
0
1
1
Data[11:4]
0
0
1
0
0
1
0
0
Data[11:4]
0
0
1
0
0
1
0
1
Data[11:4]
0
0
1
0
0
1
1
0
Data[11:4]
0
0
1
0
0
1
1
1
Data[11:4]
0
0
1
0
1
X
X
X
X
X
X
X
X
X
0
0
1
0
1
1
1
1
Data[11:4]
Power-Down Register
0
1
0
0
X
X
X
X
X
PD1 PD0 DAC A DAC B DAC C
0
1
0
0
X
X
X
X
X
0
0 DAC A DAC B DAC C
0
1
0
0
X
X
X
X
X
0
1 DAC A DAC B DAC C
0
1
0
0
X
X
X
X
X
1
0 DAC A DAC B DAC C
0
1
0
0
X
X
X
X
X
1
1 DAC A DAC B DAC C
Clear Code Register
0
1
0
1
X
X
X
X
X
X
X
X
X
X
0
1
0
1
X
X
X
X
X
X
X
X
X
X
0
1
0
1
X
X
X
X
X
X
X
X
X
X
0
1
0
1
X
X
X
X
X
X
X
X
X
X
0
1
0
1
X
X
X
X
X
X
X
X
X
X
LDAC Register
0
1
1
0
X
X
X
X DAC H DAC G DAC F DAC E DAC D DAC C
DB9
X
DAC D
DAC D
DAC D
DAC D
DAC D
X
X
X
X
X
DAC B
DB8
X
DAC E
DAC E
DAC E
DAC E
DAC E
X
X
X
X
X
DAC A
DB7
X
DAC F
DAC F
DAC F
DAC F
DAC F
X
X
X
X
X
X
LEAST SIGNIFICANT DATA BYTE
DB6 DB5 DB4 DB3 DB2 DB1
Data[3:0]
Data[3:0]
Data[3:0]
Data[3:0]
Data[3:0]
Data[3:0]
Data[3:0]
Data[3:0]
X
X
Data[3:0]
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
DAC G DAC H X
X
X
X
DAC G DAC H X
X
X
X
DAC G DAC H X
X
X
X
DAC G DAC H X
X
X
X
DAC G DAC H X
X
X
X
X
CL1 CL0 X
X
X
X
0
0
X
X
X
X
0
1
X
X
X
X
1
0
X
X
X
X
1
1
X
X
X
X
X
X
X
X
X
DB0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
DESCRIPTION
Write to DAC input register of channel A and
update all DAC registers
Write to DAC input register of channel B and
update all DAC registers
Write to DAC input register of channel C and
update all DAC registers
Write to DAC input register of channel D and
update all DAC registers
Write to DAC input register of channel E and
update all DAC registers
Write to DAC input register of channel F and
update all DAC registers
Write to DAC input register of channel G and
update all DAC registers
Write to DAC input register of channel H and
update all DAC registers
Invalid code, no action performed
Broadcast mode–write to all input registers and
update all DAC registers
Each DAC bit set to '1' powers on selected DACs
Each DAC bit set to '1' powers down selected
DACs. V_OUT connected to GND through 1kΩ
pull-down resistor
Each DAC bit set to '1' powers down selected
DACs. V_OUT connected to GND through 100kΩ
pull-down resistor
Each DAC bit set to '1' powers down selected
DACs. V_OUT is High Z
Write to clear code register, CLR pin will clear to
zero scale
Write to clear code register, CLR pin will clear to
midscale
Write to clear code register, CLR pin will clear to
full scale
Write to clear code register disables CLR pin
When all DAC bits are set to '1', selected DACs
ignore the LDAC pin.
When all DAC bits are set to '0', selected DAC
registers update according to the LDAC pin.
32
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