OPA145 Datasheet, PDF (31/40 Pages) Texas Instruments – High-Precision, Low-Noise, Rail-to-Rail Output, 5.5-MHz JFET Operational Amplifiers

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12.2 Layout Example
R1
IN±
IN+
R2
R4
OPA145, OPA2145, OPA4145
SBOS427 – JUNE 2017
+V
R3
C3
1 NC
2 ±IN ±
3 +IN +
4 V±
NC 8
V+ 7
OUT 6
NC 5
C4
OUT
-V
C1
C2
Place bypass
capacitors as close to
GND
Use ground pours for
shielding the input
IC as possible
C3
C4
signal pairs
IN±
R1
R2
IN+
GND
Place components
C1
close to device and to
each other to reduce
parasitic errors
C2
R3
1 NC
2 ±IN
3 +IN
4 V±
NC 8
V+ 7
OUT 6
NC 5
+V
OUT
R4
-V
Use a low-
ESR,ceramic bypass
capacitor
Copyright © 2017, Texas Instruments Incorporated
Figure 49. Operational Amplifier Board Layout for Difference Amplifier Configuration
Copyright © 2017, Texas Instruments Incorporated
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