LM3S9790_15 Datasheet, PDF (31/1306 Pages) Texas Instruments – Stellaris LM3S9790 Microcontroller

Stellaris^® LM3S9790 Microcontroller
Register 37: CAN Message 2 Valid (CANMSG2VAL), offset 0x164 ....................................................... 932
Ethernet Controller ...................................................................................................................... 933
Register 1: Ethernet MAC Raw Interrupt Status/Acknowledge (MACRIS/MACIACK), offset 0x000 ....... 947
Register 2: Ethernet MAC Interrupt Mask (MACIM), offset 0x004 ....................................................... 950
Register 3: Ethernet MAC Receive Control (MACRCTL), offset 0x008 ................................................ 952
Register 4: Ethernet MAC Transmit Control (MACTCTL), offset 0x00C ............................................... 954
Register 5: Ethernet MAC Data (MACDATA), offset 0x010 ................................................................. 956
Register 6: Ethernet MAC Individual Address 0 (MACIA0), offset 0x014 ............................................. 958
Register 7: Ethernet MAC Individual Address 1 (MACIA1), offset 0x018 ............................................. 959
Register 8: Ethernet MAC Threshold (MACTHR), offset 0x01C .......................................................... 960
Register 9: Ethernet MAC Management Control (MACMCTL), offset 0x020 ........................................ 962
Register 10: Ethernet MAC Management Divider (MACMDV), offset 0x024 .......................................... 964
Register 11: Ethernet MAC Management Transmit Data (MACMTXD), offset 0x02C ............................. 965
Register 12: Ethernet MAC Management Receive Data (MACMRXD), offset 0x030 .............................. 966
Register 13: Ethernet MAC Number of Packets (MACNP), offset 0x034 ............................................... 967
Register 14: Ethernet MAC Transmission Request (MACTR), offset 0x038 ........................................... 968
Register 15: Ethernet MAC LED Encoding (MACLED), offset 0x040 .................................................... 969
Register 16: Ethernet PHY MDIX (MDIX), offset 0x044 ....................................................................... 971
Register 17: Ethernet PHY Management Register 0 – Control (MR0), address 0x00 ............................. 972
Register 18: Ethernet PHY Management Register 1 – Status (MR1), address 0x01 .............................. 974
Register 19: Ethernet PHY Management Register 2 – PHY Identifier 1 (MR2), address 0x02 ................. 976
Register 20: Ethernet PHY Management Register 3 – PHY Identifier 2 (MR3), address 0x03 ................. 977
Register 21: Ethernet PHY Management Register 4 – Auto-Negotiation Advertisement (MR4), address
0x04 ............................................................................................................................. 978
Register 22: Ethernet PHY Management Register 5 – Auto-Negotiation Link Partner Base Page Ability
(MR5), address 0x05 ..................................................................................................... 980
Register 23: Ethernet PHY Management Register 6 – Auto-Negotiation Expansion (MR6), address
0x06 ............................................................................................................................. 982
Register 24: Ethernet PHY Management Register 16 – Vendor-Specific (MR16), address 0x10 ............. 983
Register 25: Ethernet PHY Management Register 17 – Mode Control/Status (MR17), address 0x11 ...... 984
Register 26: Ethernet PHY Management Register 27 – Special Control/Status (MR27), address
0x1B ............................................................................................................................. 986
Register 27: Ethernet PHY Management Register 29 – Interrupt Status (MR29), address 0x1D ............. 987
Register 28: Ethernet PHY Management Register 30 – Interrupt Mask (MR30), address 0x1E ............... 989
Register 29: Ethernet PHY Management Register 31 – PHY Special Control/Status (MR31), address
0x1F ............................................................................................................................. 991
Universal Serial Bus (USB) Controller ....................................................................................... 992
Register 1: USB Device Functional Address (USBFADDR), offset 0x000 .......................................... 1020
Register 2: USB Power (USBPOWER), offset 0x001 ....................................................................... 1021
Register 3: USB Transmit Interrupt Status (USBTXIS), offset 0x002 ................................................. 1024
Register 4: USB Receive Interrupt Status (USBRXIS), offset 0x004 ................................................. 1026
Register 5: USB Transmit Interrupt Enable (USBTXIE), offset 0x006 ................................................ 1028
Register 6: USB Receive Interrupt Enable (USBRXIE), offset 0x008 ................................................. 1030
Register 7: USB General Interrupt Status (USBIS), offset 0x00A ...................................................... 1032
Register 8: USB Interrupt Enable (USBIE), offset 0x00B .................................................................. 1035
Register 9: USB Frame Value (USBFRAME), offset 0x00C .............................................................. 1038
Register 10: USB Endpoint Index (USBEPIDX), offset 0x00E ............................................................ 1039
Register 11: USB Test Mode (USBTEST), offset 0x00F ..................................................................... 1040
July 03, 2014
31
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