THS4561 Datasheet, PDF (30/35 Pages) Texas Instruments – Low-Power, High Supply Range, 70-MHz, Fully Differential Amplifier

THS4561
SBOS874 – AUGUST 2017
www.ti.com
11 Power Supply Recommendations
The THS4561 is principally intended to operate with a nominal single-supply voltage of 3 V to 12 V. Supply
voltage tolerances are supported with the specified operating range of 2.85 V (10% low on a 3-V nominal supply)
and 12.6 V (5% high on a 12-V nominal supply). Supply decoupling is required, as described in the Terminology
and Application Assumptions section. Split (or bipolar) supplies can be used with the THS4561, as long as the
total value across the device remains less than 12.6 V (absolute maximum). The thermal pad on the RGT
package is electrically isolated form the die; connect the thermal pad (RGT package only) to any power or
ground plane for reduced thermal impedance to the junction temperature. This pad must be connected to some
power or ground plane and not floated.
Using a negative supply to deliver a true swing to ground output when driving SAR ADCs can be desired.
Although the THS4561 quotes a rail-to-rail output, linear operation requires approximately 200-mV headroom to
the supply rails. One easy option for extending the linear output swing to ground is to provide the small negative
supply voltage required using the LM7705 fixed –230-mV, negative-supply generator. This low-cost, fixed,
negative-supply generator can accept a 3-V to 5-V positive supply and provides a fixed –230-mV supply for the
negative power supply. Using the LM7705 provides an effective solution, as discussed in the Extending Rail-to-
Rail Output Range for Fully Differential Amplifiers to Include True Zero Volts TI design (TIDU187)
12 Layout
12.1 Layout Guidelines
12.1.1 Board Layout Recommendations
Similar to all high-speed devices, best system performance is achieved with close attention to board layout. The
THS4561DGKEVM user guide (TBD) shows a good example of high-frequency layout techniques as a reference.
This EVM includes numerous extra elements and features for characterization purposes that may not apply to
some applications. General high-speed signal path layout suggestions include:
• Continuous ground planes are preferred for signal routing with matched impedance traces for longer runs;
however, both ground and power planes must be opened up around the capacitive sensitive input and output
device pins. When the signal goes to a resistor, parasitic capacitance becomes more of a band-limiting issue
and less of a stability issue.
• Good high-frequency decoupling capacitors (0.1 µF) are required to a ground plane at the device power pins.
Additional higher-value capacitors (2.2 µF) are also required but can be placed further from the device power
pins and shared among devices. For best high-frequency decoupling, consider X2Y supply decoupling
capacitors that offer a much higher self-resonance frequency over standard capacitors.
• Differential signal routing over any appreciable distance must use microstrip layout techniques with matched
impedance traces.
• Higher-speed FDAs such as the THS4561 include a duplicate of the output pins on the input feedback side of
the larger 16-pin VQFN (RGT) package. This feature is intended to allow the external feedback resistors to be
connected with virtually no trace length on the input side of the package. This internal feedback trace also
provides a second feedback path for connecting a feedback capacitor on the input pin sides for band-limited
or multiple feedback filter designs. This internal trace shows an approximate 3.3-Ω series resistance that must
be considered in any design using that path. The TINA-TI™ model does not include that element (to be
generally applicable to all package styles) and must be added externally if the RGT package is used. Use this
layout approach without extra trace length on the critical feedback path. The smaller 10-pin WQFN package
lines up the outputs and the required inputs on the same side of the package where the feedback R_F resistors
must be placed immediately adjacent to the package with minimal trace length.
• The input summing junctions are very sensitive to parasitic capacitance. Any R_G elements must connect into
the summing junction with minimal trace length to the device pin side of the resistor. The other side of the R_G
elements can have more trace length if needed to the source or to GND.
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