THMC50_08 Datasheet, PDF (3/34 Pages) Texas Instruments – REMOTE/LOCAL TEMPERATURE MONITOR AND FAN CONTROLLER WITH SMBus INTERFACE

TERMINAL
NAME
ADD/NTEST_OUT
AUXRST
FAN_OFF
FAN_SPD/NTEST_IN
GND
GPI
INT
MR
REMOTE_DIODE–
REMOTE_DIODE+
RST
SCL
SDA
THERM
VCC3
VCC3AUX
I/O
NO.
13 Digital I/O
3 Digital I/O
(open drain)
1 Digital output
(open drain)
8 Analog
output/test input
4 Ground
12 Digital input
14 Digital output
(open drain)
2 Digital input
9 Remote thermal
diode negative
input
10 Remote thermal
diode positive
input
7 Digital output
(open drain)
15 Digital input
16 Digital I/O
(open drain)
11 Digital I/O
(open drain)
6 Analog input
5 Power supply
voltage input
THMC50
REMOTE/LOCAL TEMPERATURE MONITOR AND
FAN CONTROLLER WITH SMBus INTERFACE
SLIS090 – JULY 1999
Terminal Functions
DESCRIPTION
This terminal is used to determine the two LSBs of the SMBus address during initial
power on and it also functions as a digital output when doing a NAND tree test.
This terminal is asserted low while VCC3AUX remains below the reset threshold. It
remains asserted for the reset timeout period after the reset condition is terminated. It is
bidirectional so that the THMC50 can be optionally reset; external logic must be used to
prevent a system auxiliary reset from occurring.
Fan off request output. When commanded low via bit 5 in the configuration register
(0×40), this indicates a request to shut the fan off independent of the FAN_SPD output.
When commanded high via bit 5 in the configuration register (0×40), it indicates that the
fan may be turned on. This is an open-drain output requiring an external pullup.
Note: This terminal requires external circuitry to turn the fan off. It does not command the
analog output to 0×00 (see Typical Application Schematic).
This terminal is an active-high input that enables NAND tree board-level connectivity
testing during device power up. Refer to the section on NAND tree testing. Also used as
the analog output of the 8-bit DAC for fan speed control when not in NAND tree test
mode.
General-purpose input. The logic state of this terminal is reflected in bit 4 of the interrupt
status register (0x41). The logic state of the GPI terminal reported in bit 4 of the interrupt
status register (0x41) is inverted from the actual GPI logic state if bit 6 of the configuration
register (0x40) is set to a 1. If bit 6 of the configuration register (0×40) is set to a 0, then bit
4 of the interrupt status register (0×41) reports the same logic state present on the GPI
terminal.
System interrupt output. This signal indicates a violation of a set trip point. The INT output
is enabled when bit 1 of the configuration register (0x40) is set to 1. The default state is
disabled.
Manual reset. A logic low on this input causes RST to be asserted. Once this input is
negated, RST remains asserted for approximately 180 ms. This input has an internal
20-kΩ pullup resistor. Leave unconnected if not used.
This is the negative input (current sink) from the remote thermal diode.
This is the positive input (current source) from the remote thermal diode.
This terminal is asserted low under any of the following conditions:
• VCC3 remains below the reset threshold
• While MR is held low
• While AUXRST is asserted
It remains asserted for the reset timeout period after the reset conditions are terminated.
The RST function also resets the FAN_SPD analog output to 0xoo when asserted,
unless THERM is asserted, then the FAN_SPD analog output will be 0xFF.
Serial SMBus clock
Serial SMBus bidirectional data
This is an active low thermal overload output that indicates a violation of a temperature
set point (overtemperature) for at least three monitoring cycles. Also acts as an input to
indicate a thermal event for fan control. When this signal is asserted low externally, a
status bit is set. The automatic fan control is activated to full on whenever this signal is
low.
This is a 3.3-V main voltage monitor input for main reset generator (RST). This is not the
power supply terminal for THMC50.
This 3.3-V auxiliary voltage is the THMC50 power source and voltage monitor input for
auxiliary reset generator (AUXRST). This terminal powers all THMC50 internal circuitry.
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