SM72240 Datasheet, PDF (3/15 Pages) Texas Instruments – SM72240 SolarMagic 5-Pin Microprocessor Reset Circuit

SM72240
www.ti.com
SNIS154C – JANUARY 2011 – REVISED APRIL 2013
Absolute Maximum Ratings⁽¹⁾⁽²⁾
V_CC, MR
RESET, RESET
Input Current, V_CC Pin
Output Current, RESET, RESET Pin
ESD Rating⁽³⁾
Continuous Power Dissipation (T_A = +70°C)
Operating Temperature Range
Maximum Junction Temperature
Storage Temperature Range
Lead Temperature (soldering, 10sec)
SOT-23 ⁽⁴⁾
−0.3V to 6.0V
−0.3V to (V_CC+ 0.3V)
20mA
20mA
2kV
320mW
−40°C to +125°C
125°C
−65°C to +160°C
+300°C
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which the
device operates correctly. Operating ratings do not imply specified performance limits. For performance limits and associated test
conditions, see the Electrical Characteristics.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3) The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin.
(4) At elevated temperatures, devices must be derated based on package thermal resistance. The device must be derated at 4.5mW/°C at
ambient temperatures above 70°C. The device has internal thermal protection.
Electrical Characteristics
Typical values are at T_A = +25°C. Limits with standard typeface are for T_A = +25°C, and limits in boldface type apply for the
operating temperature range −40°C to +125°C , unless otherwise noted.⁽¹⁾
Symbol
Parameter
Conditions
Min
Typ
Max
Units
V_CC V_CC Range
I_CC
Supply Current
(I_LOAD = 0A)
V_TH Reset Threshold
SM72240-4.63
SM72240-3.08
SM72240-4.63
SM72240-3.08
V_CC = 5.5V
V_CC = 3.6V
1.0
5.5
V
8
15
µA
7
10
4.54
4.63
4.72
4.50
4.75
V
3.03
3.08
3.14
3.00
3.15
V_TH
Tempco
t_RD
t_RP
t_MR
t_MD
Reset Threshold Temperature
Coefficient
V_CC to Reset Delay⁽²⁾
Reset Active Timeout Period
MR Minimum Pulse Width
MR to Reset Propagation
Delay
MR Glitch Immunity⁽³⁾
V_CC = V_TH to (V_TH − 100mV)
30
ppm/°C
20
µs
100
190
560
ms
10
µs
2
µs
100
ns
V_IH
MR Input Threshold
V_IL
MR Pull-Up Resistance
V_CC > V_TH(MAX)
2.3
V
0.8
22
kΩ
RESETOutput Voltage Low
V_OL
I_IN RESET Output Leakage
Current (SM72240)
V_CC = V_TH min, I_SINK = 3.2 mA
V_CC > 1V, I_SINK = 50µA
V_CC > V_TH, RESET = 5.5V
0.4
V
0.3
0.5
µA
(1) Production testing done at T_A = +25°C. Limits over the operating temperature range are specified through correlation using Statistical
Quality Control (SQC) methods.
(2) RESET output.
(3) Glitches of 100 ns or less typically will not generate a reset pulse.
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