MSC1211_16 Datasheet, PDF (3/109 Pages) Texas Instruments – Percision Analog-to-Digital Converter and Digital-to-Analog Converters

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MSC121xYX FAMILY FEATURES
FEATURES(1)
Flash Program Memory (Bytes)
Flash Data Memory (Bytes)
Internal Scratchpad SRAM (Bytes)
Internal MOVX RAM (Bytes)
Externally Accessible Memory (Bytes)
MSC121xY2⁽²⁾
Up to 4k
Up to 4k
256
1024
64k Program, 64k Data
MSC121xY3⁽²⁾
Up to 8k
Up to 8k
256
1024
64k Program, 64k Data
(1) _{All peripheral features are the same on all devices; the flash memory size is the only difference.}
(2) _{The last digit of the part number (N) represents the onboard flash size = (2}N_)kBytes.
MSC1211, MSC1212
MSC1213, MSC1214
SBAS323G − JUNE 2004 − REVISED OCTOBER 2007
MSC121xY4⁽²⁾
Up to 16k
Up to 16k
256
1024
64k Program, 64k Data
MSC121xY5⁽²⁾
Up to 32k
Up to 32k
256
1024
64k Program, 64k Data
ELECTRICAL CHARACTERISTICS: AV_DD = 5V
All specifications from T_MIN to T_MAX, DV_DD = +2.7V to 5.25V, AV_DD = +5V, f_MOD = 15.625kHz, PGA = 1, filter = Sinc³, Buffer ON, fDATA = 10Hz, Bipolar, f_CLK = 8MHz,
and V_REF ≡ (REF IN+) − (REF IN−) = +2.5V, unless otherwise noted. For V_DAC, V_REF = AV_DD, R_LOAD = 10kΩ, and C_LOAD = 200pF, unless otherwise noted.
MSC1211/12/13/14
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Analog Inputs (AIN0−AIN7, AINCOM)
Analog Input Range
Full-Scale Input Voltage Range
Differential Input Impedance
Input Current
Fast Settling Filter
Bandwidth
Sinc² Filter
Sinc³ Filter
Programmable Gain Amplifier
Input Capacitance
Input Leakage Current
Burnout Current Sources
Buffer OFF
Buffer ON
(AIN+) − (AIN−)
Buffer OFF
Buffer ON
−3dB
−3dB
−3dB
User-Selectable Gain Range
Buffer ON
Multiplexer Channel OFF, T = +25°C
Buffer ON
AGND − 0.1
AV_DD + 0.1
V
AGND + 50mV
AV_DD − 1.5
V
±V_REF/PGA
V
7/PGA⁽¹⁾
MΩ
0.5
nA
0.469 • f_DATA
0.318 • f_DATA
0.262 • f_DATA
1
128
9
pF
0.5
pA
±2
µA
ADC Offset DAC
Offset DAC Range
Offset DAC Monotonicity
Offset DAC Gain Error
Offset DAC Gain Error Drift
Bipolar Mode
±V_REF/(2 • PGA)
8
±1.5
1
V
Bits
% of Range
ppm/°C
System Performance
Resolution
24
ENOB
See Typical Characteristics
22
Output Noise
No Missing Codes
Sinc³ Filter, Decimation > 360
See Typical Characteristics
24
Integral Nonlinearity
End Point Fit, Bipolar Mode
0.0003
±0.0015
Offset Error
Offset Drift⁽²⁾
Gain Error⁽³⁾
Gain Error Drift⁽²⁾
After Calibration
Before Calibration
After Calibration
Before Calibration
±3.5
0.1
−0.002
0.5
System Gain Calibration Range
80
120
System Offset Calibration Range
−50
50
At DC
115
Common-Mode Rejection
f_CM = 60Hz, fDATA = 10Hz
f_CM = 50HZ, fDATA = 50Hz
130
120
f_CM = 60Hz, fDATA = 60Hz
120
Normal-Mode Rejection
f_SIG = 50Hz, fDATA = 50Hz
100
f_SIG = 60Hz, fDATA = 60Hz
100
Power-Supply Rejection
At DC, dB = −20log(∆VOUT/∆V_DD)⁽⁴⁾
92
(1) _{The input impedance for PGA = 128 is the same as that for PGA = 64 (that is, 7MΩ/64).}
(2) _{Calibration can minimize these errors.}
(3) _{The self gain calibration cannot have a REF IN+ of more than AVDD −1.5V with Buffer ON. To calibrate gain, turn Buffer OFF.}
(4) _{∆VOUT is change in digital result.}
(5) _{9pF switched capacitor at fSAMP clock frequency (see Figure 14).}
(6) _{Linearity calculated using a reduced code range of 512 to 65024; output unloaded.}
(7) _{Ensured by design and characterization; not production tested.}
(8) _{Analog Brownout Detect OFF (HCR1.3 = 1), Analog LVD OFF (LVDCON.7 = 1).}
Bits
Bits
Bits
%FSR
ppm of FS
ppm of FS/°C
%
ppm/°C
% of FS
% of FS
dB
dB
dB
dB
dB
dB
dB
3