LMH2180 Datasheet, PDF (3/24 Pages) National Semiconductor (TI) – 75 MHz Dual Clock Buffer

LMH2180
www.ti.com
SNAS419D – JANUARY 2008 – REVISED MARCH 2013
OPERATING RATINGS ⁽¹⁾
Supply Voltage (V⁺ – V^−)
Temperature Range ⁽²⁾⁽³⁾
Package Thermal Resistance ⁽²⁾⁽³⁾
2.4V to 5.0V
−40°C to 85°C
8-Pin WSON (θ_JA)
8-Bump DSBGA (θ_JA)
217°C/W
90°C/W
(1) “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of
the device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or
other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating
Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All
voltages are measured with respect to the ground pin, unless otherwise specified.
(2) The Electrical Characteristics tables show performance under the specified Recommended Operating Conditions except as otherwise
modified by the Electrical Characteristics Conditions and/or Notes. Typical values represent typical performance as measured by
production tests. Individual parts may vary.
(3) The maximum power dissipation must be derated at elevated temperatures and is dictated by T_J(MAX), θ_JA , and the ambient temperature
T_A. The maximum allowable power dissipation is P_DMAX = (T_JMAX − T_A) / θ_JA or the number given in the Absolute Maximum Ratings,
whichever is lower.
2.7V ELECTRICAL CHARACTERISTICS
Unless otherwise specified, all limits are specified for T_A = 25°C, V_DD = 2.7V, V_SS = 0V, V_CM = 1V, Enable_1,2 = V_DD, C_L = 10
pF, R_L = 30 kΩ, Load is connected to V_SS, C_COUPLING = 10 nF. Boldface limits apply at temperature range extremes of
operating condition.⁽¹⁾
Parameter
Test Conditions
Min ⁽²⁾
Typ ⁽³⁾ Max ⁽²⁾
Units
Frequency Domain Response
SSBW
LSBW
GFN
Small Signal Bandwidth
Large Signal Bandwidth
Gain Flatness < 0.1 dB
V_IN = 100 mV_PP; −3 dB
V_IN = 1.0 V_PP; −3 dB
f > 100 kHz
78
MHz
60
MHz
4.9
MHz
Distortion and Noise Performance
φ_n
Phase Noise
V_IN = 1 V_PP, f_C = 38.4 MHz, Δf = 1 kHz
V_IN = 1 V_PP, f_C = 38.4 MHz, Δf = 10
kHz
−123
−132
dBc/Hz
dBc/Hz
e_n
I_SOLATION
CT
Input-Referred Voltage Noise
Output to Input
Crosstalk Rejection
Time Domain Response
f = 1 MHz, R_SOURCE = 50Ω
f = 1 MHz, R_SOURCE = 50Ω
f = 38.4 MHz, V_IN = 1 V_PP
13
nV/√Hz
84
dB
41
dB
t_r
Rise Time
t_f
Fall Time
t_s
Settling Time to 0.1%
OS
Overshoot
SR
Slew Rate ⁽⁴⁾
Static DC Performance
0.1 V_PP Step (10-90%)
1 V_PP Step
0.1 V_PP Step
V_IN = 2 V_PP
6
ns
5
ns
120
ns
37
%
106
V/µs
I_S
Supply Current
Enable_1,2 = V_DD ; No Load
2.3
2.7
2.9
mA
Enable₁ = V_DD , Enable₂ = V_SS , No
Load
1.3
1.5
1.6
mA
Enable_1,2 = V_SS ; No Load
30
41
46
μA
PSRR
Power Supply Rejection Ratio
DC (3.0V to 5.0V)
65
64
68
dB
(1) The Electrical Characteristics tables show performance under the specified Recommended Operating Conditions except as otherwise
modified by the Electrical Characteristics Conditions and/or Notes. Typical values represent typical performance as measured by
production tests. Individual parts may vary.
(2) Datasheet min/max limits are specified by test or statistical analysis.
(3) Typical values represent the most likely parametric norms at T_A = +25°C, and at the Recommended Operation Conditions at the time of
product characterization.
(4) Slew rate is the average of the rising and falling slew rates.
Copyright © 2008–2013, Texas Instruments Incorporated
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