LMH2180 Datasheet, PDF (15/24 Pages) National Semiconductor (TI) – 75 MHz Dual Clock Buffer

www.ti.com
LMH2180
SNAS419D – JANUARY 2008 – REVISED MARCH 2013
Phase Noise
(dBc/Hz)
Âf
f_C
FREQUENCY (Hz)
BW = 1 Hz
Figure 39. Phase Noise
Figure 40 shows the setup used to measure the LMH2180 phase noise. The clock driving the LMH2180 is a
state of the art 38.4MHz TCXO. Both the TCXO phase noise and the phase noise at the LMH2180 output were
measured. At offset frequencies of 1 kHz and higher from the carrier, the TCXO phase noise is sufficiently low to
accurately calculate the LMH2180 contribution to the phase noise at the output. The LMH6559, whose phase
noise contribution can be neglected, is used to drive the 50Ω input impedance of the Signal Source Analyzer.
LAYOUT DESIGN RECOMMENDATION
Careful consideration during circuit design and PCB layout will eliminate problems and will optimize the
performance of the LMH2180. It is best to have the same ground plane on the PCB for all decoupling and other
ground connections.
To ensure a clean supply voltage it is best to place decoupling capacitors close to the LMH2180, between V_DD
and V_SS.
Another important issue is the value of the components, because this also determines the sensitivity to
disturbances. Resistor values have to be low enough to avoid a significant noise contribution and large enough to
avoid a significant increase in power consumption while loading inputs or outputs to heavily.
Enable 1
TCXO
VDD
EN1 8
1
IN1 2
1
7 OUT1
LMH6559
10 nF
E5052A/B
Signal Source
Analyzer
10 nF
50:
LMH2180
Buffer for
driving 50:
38.4 MHz
IN2 3
2
6
EN2 4
5
Enable 2
VSS
Figure 40. Measurement Setup
Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LMH2180
Submit Documentation Feedback
15