LMC6772AIMMX_NOPB Datasheet, PDF (3/25 Pages) Texas Instruments – Dual Micropower Rail-To-Rail Input CMOS Comparator with Open Drain Output

LMC6772
www.ti.com
SNOS749F – SEPTEMBER 1995 – REVISED MARCH 2013
2.7V Electrical Characteristics
Unless otherwise specified, all limits ensured for T_J = 25°C, V⁺ = 2.7V, V^− = 0V, V_CM = V⁺/2. Boldface limits apply at the
temperature extremes.
Symbol
Parameter
Conditions
Typ⁽¹⁾ LMC6772AI LMC6772BI LMC6772Q
Limit ⁽²⁾
Limit ⁽²⁾
Limit ⁽²⁾
Units
V_OS
Input Offset Voltage
3
5
8
15
10
mV
18
13
max
TCV_OS Input Offset Voltage Temperature
2.0
Drift
Input Offset Voltage Average
See ⁽³⁾
3.3
Drift
μV/°C
μV/Mont
h
I_B
Input Current
0.02
pA
I_OS
Input Offset Current
0.01
pA
CMRR Common Mode Rejection Ratio
75
dB
PSRR
A_V
V_CM
Power Supply Rejection Ratio
Voltage Gain
Input Common-Mode Voltage
Range
±1.35V < V_S < ±7.5V
(By Design)
CMRR > 55 dB
80
dB
100
dB
3.0
2.9
2.9
2.9
V
2.7
2.7
2.7
min
−0.3
−0.2
−0.2
−0.2
V
0.0
0.0
0.2
max
V_OL
Output Voltage Low
I_LOAD = 2.5 mA
0.2
0.3
0.4
0.3
0.3
V
0.4
0.45
max
I_S
Supply Current
For Both Comparators
12
20
20
20
μA
(Output Low)
25
25
25
max
I_Leakage Output Leakage Current
V_IN(+) = 0.5V,
V_IN(−) = 0V, V_O = 15V
0.1
500
500
500
nA
1000
(1) Typical Values represent the most likely parametric norm.
(2) All limits are specified by testing or statistical analysis.
(3) Input offset voltage Average Drift is calculated by dividing the accelerated operating life drift average by the equivalent operational time.
The input offset voltage average drift represents the input offset voltage change at worst-case input conditions.
Copyright © 1995–2013, Texas Instruments Incorporated
Product Folder Links: LMC6772
Submit Documentation Feedback
3