LM3429_14 Datasheet, PDF (3/50 Pages) Texas Instruments – LM3429Q1 N-Channel Controller for Constant Current LED Drivers

LM3429
www.ti.com
SNVS616F – APRIL 2009 – REVISED JANUARY 2010
Pin Descriptions (continued)
Pin
Name
2
COMP
3
CSH
4
RCT
5
AGND
6
OVP
7
8
9
10
11
12
13
14
DAP
(15)
nDIM
NC
PGND
GATE
V_CC
IS
HSP
HSN
DAP
Description
Compensation
Current Sense High
Resistor Capacitor Timing
Analog Ground
Over-Voltage Protection
Not DIM input
No Connection
Power Ground
Gate Drive Output
Internal Regulator Output
Main Switch Current Sense
LED Current Sense Positive
LED Current Sense Negative
Thermal pad on bottom of IC
Application Information
Connect a capacitor to AGND to set compensation.
Connect a resistor to AGND to set signal current. For analog
dimming, connect current source or potentiometer to AGND (see
Analog Dimming section).
Connect a resistor from the switch node and a capacitor to
AGND to set the switching frequency.
Connect to PGND through the DAP copper circuit board pad to
provide proper ground return for CSH, COMP, and RCT.
Connect to a resistor divider from V_O to program output over-
voltage lockout (OVLO). Turn-off threshold is 1.24V and
hysteresis for turn-on is provided by 20 µA current source.
Connect a PWM signal for dimming as detailed in the PWM
Dimming section and/or a resistor divider from V_IN to program
input under-voltage lockout (UVLO). Turn-on threshold is 1.24V
and hysteresis for turn-off is provided by 20 µA current source.
Leave open.
Connect to AGND through DAP copper pad to provide ground
return for GATE.
Connect to the gate of the external NFET.
Bypass with a 2.2 µF–3.3 µF, ceramic capacitor to PGND.
Connect to the drain of the main N-channel MosFET switch for
R_DS-ON sensing or to a sense resistor installed in the source of
the same device.
Connect through a series resistor to LED current sense resistor
(positive).
Connect through a series resistor to LED current sense resistor
(negative).
Connect to AGND and PGND. For thermal considerations see ⁽¹⁾.
(1) Junction-to-ambient thermal resistance is highly board-layout dependent. The numbers listed in the table are given for a reference layout
wherein the 14L TSSOP EP package has its DAP pad populated with 9 vias. In applications where high maximum power dissipation
exists, namely driving a large MosFET at high switching frequency from a high input voltage, special care must be paid to thermal
dissipation issues during board design. In high-power dissipation applications, the maximum ambient temperature may have to be
derated. Maximum ambient temperature (T_A-MAX) is dependent on the maximum operating junction temperature (T_J-MAX-OP = 125°C), the
maximum power dissipation of the device in the application (P_D-MAX), and the junction-to ambient thermal resistance of the package in
the application (θ_JA), as given by the following equation: T_A-MAX = T_J-MAX-OP – (θ_JA × P_D-MAX). In most applications there is little need for
the full power dissipation capability of this advanced package. Under these circumstances, no vias would be required and the thermal
resistances would be 104 °C/W for the 14L TSSOP EP. It is possible to conservatively interpolate between the full via count thermal
resistance and the no via count thermal resistance with a straight line to get a thermal resistance for any number of vias in between
these two limits.
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