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LM3429_14 Datasheet, PDF (15/50 Pages) Texas Instruments – LM3429Q1 N-Channel Controller for Constant Current LED Drivers
LM3429
www.ti.com
SNVS616F – APRIL 2009 – REVISED JANUARY 2010
100
135
öP1
80
öZ1
90
GAIN
60
45
40
PHASE
20
0
0
-45
0° Phase Margin
-90
-20
-135
-40
-180
-60
1e-1
1e1
1e3
1e5
FREQUENCY (Hz)
-225
1e7
Figure 8. Uncompensated Loop Gain Frequency Response
Figure 8 shows the uncompensated loop gain in a worst-case scenario when the RHP zero is below the output
pole. This occurs at high duty cycles when the regulator is trying to boost the output voltage significantly. The
RHP zero adds 20dB/decade of gain while loosing 45°/decade of phase which places the crossover frequency
(when the gain is zero dB) extremely high because the gain only starts falling again due to the high frequency
pole (not modeled or shown in figure). The phase will be below -180° at the crossover frequency which means
there is no phase margin (180° + phase at crossover frequency) causing system instability. Even if the output
pole is below the RHP zero, the phase will still reach -180° before the crossover frequency in most cases yielding
instability.
ILED
VSNS RSNS
CFS
RFS
RHSP
RHSN
sets öP3 RCSH
sets öP2
CCMP
LM3429
High-Side
HSP Sense Amplifier
HSN
CSH
COMP
1.24V
Error Amplifier
To PWM
RO
Comparator
Figure 9. Compensation Circuitry
To mitigate this problem, a compensator should be designed to give adequate phase margin (above 45°) at the
crossover frequency. A simple compensator using a single capacitor at the COMP pin (CCMP) will add a dominant
pole to the system, which will ensure adequate phase margin if placed low enough. At high duty cycles (as
shown in Figure 8), the RHP zero places extreme limits on the achievable bandwidth with this type of
compensation. However, because an LED driver is essentially free of output transients (except catastrophic
failures open or short), the dominant pole approach, even with reduced bandwidth, is usually the best approach.
The dominant compensation pole (ωP2) is determined by CCMP and the output resistance (RO) of the error
amplifier (typically 5 MΩ):
ZP2
=
5e6:
1
x CCMP
(17)
It may also be necessary to add one final pole at least one decade above the crossover frequency to attenuate
switching noise and, in some cases, provide better gain margin. This pole can be placed across RSNS to filter the
ESL of the sense resistor at the same time. Figure 9 shows how the compensation is physically implemented in
the system.
The high frequency pole (ωP3) can be calculated:
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