DRV8833 Datasheet, PDF (3/22 Pages) Texas Instruments – DUAL H-BRIDGE MOTOR DRIVER

DRV8833
www.ti.com
SLVSAR1B – JANUARY 2011 – REVISED AUGUST 2011
Table 1. TERMINAL FUNCTIONS
NAME
PIN
(PWP)
POWER AND GROUND
GND
13
PPAD
PIN
(RTY)
11
PPAD
VM
12
10
VINT
14
12
VCP
11
9
CONTROL
AIN1
16
14
AIN2
15
13
BIN1
9
7
BIN2
10
8
nSLEEP
STATUS
nFAULT
OUTPUT
AISEN
1
15
8
6
3
1
BISEN
AOUT1
AOUT2
BOUT1
BOUT2
6
4
2
16
4
2
7
5
5
3
I/O ⁽¹⁾
DESCRIPTION
-
Device ground
-
Device power supply
-
Internal supply bypass
IO
High-side gate drive voltage
I
Bridge A input 1
I
Bridge A input 2
I
Bridge B input 1
I
Bridge B input 2
I
Sleep mode input
OD
Fault output
IO
Bridge A ground / Isense
IO
Bridge B ground / Isense
O
Bridge A output 1
O
Bridge A output 2
O
Bridge B output 1
O
Bridge B output 2
EXTERNAL COMPONENTS
OR CONNECTIONS
Both the GND pin and device
PowerPAD must be connected to
ground
Connect to motor supply. A 10-µF
(minimum) ceramic bypass capacitor to
GND is recommended.
Bypass to GND with 2.2-μF, 6.3-V
capacitor
Connect a 0.01-μF, 16-V (minimum)
X7R ceramic capacitor to VM
Logic input controls state of AOUT1.
Internal pulldown.
Logic input controls state of AOUT2.
Internal pulldown.
Logic input controls state of BOUT1.
Internal pulldown.
Logic input controls state of BOUT2.
Internal pulldown.
Logic high to enable device, logic low to
enter low-power sleep mode and reset
all internal logic. Internal pulldown.
Logic low when in fault condition
(overtemp, overcurrent)
Connect to current sense resistor for
bridge A, or GND if current control not
needed
Connect to current sense resistor for
bridge B, or GND if current control not
needed
Connect to motor winding A
Connect to motor winding B
(1) Directions: I = input, O = output, OZ = tri-state output, OD = open-drain output, IO = input/output
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): DRV8833
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