DRV8823-Q1 Datasheet, PDF (3/18 Pages) Texas Instruments – 4-BRIDGE SERIAL INTERFACE MOTOR DRIVER

DRV8823-Q1
www.ti.com
SLVSBH2A – JUNE 2012 – REVISED JULY 2012
PIN
NAME
NO.
I/O ⁽¹⁾
POWER AND GROUND
VM
(4 pins)
1, 2,
23, 24
-
V3P3
16
-
GND
10–15,
34–39
-
CP1
7
IO
CP2
8
IO
VCP
9
IO
MOTOR DRIVERS
ABVREF
17
I
AOUT1
5
O
AOUT2
3
O
ISENA
4
-
BOUT1
48
O
BOUT2
46
O
ISENB
47
-
CDVREF
18
I
COUT1
27
O
COUT2
25
O
ISENC
26
-
DOUT1
22
O
DOUT2
20
O
ISEND
22
-
SERIAL INTERFACE
SDATA
31
I
SCLK
33
I
SCS
45
I
SSTB
30
I
RESETn
43
I
SLEEPn
42
I
TEST PINS
TEST
19, 28,
29, 32
I
PIN FUNCTIONS
DESCRIPTION
EXTERNAL COMPONENTS OR CONNECTIONS
Motor supply voltage (multiple pins)
3.3 V regulator output
Power ground (multiple pins)
Charge pump flying capacitor
Charge pump storage capacitor
Connect all VM pins together to motor supply voltage.
Bypass to GND with several 0.1-μF, 35-V ceramic capacitors.
Bypass to GND with 0.47-μF, 6.3-V ceramic capacitor.
Connect all PGND pins to GND and solder to copper heatsink
areas.
Connect a 0.01-μF capacitor between CP1 and CP2.
Connect a 0.1-μF, 16 V ceramic capacitor to V_M.
Bridge A & B current set reference voltage
Bridge A output 1
Bridge A output 2
Bridge A current sense
Bridge B output 1
Bridge B output 2
Bridge B current sense
Bridge C & D current set reference voltage
Bridge C output 1
Bridge C output 2
Bridge C current sense
Bridge D output 1
Bridge D output 2
Bridge D current sense
Sets current trip threshold
Connect to first coil of bipolar stepper motor 1, or DC motor
winding.
Connect to current sense resistor for bridge A.
Connect to second coil of bipolar stepper motor 1, or DC
motor winding.
Connect to current sense resistor for bridge B.
Sets current trip threshold
Connect to first coil of bipolar stepper motor 2, or DC motor
winding.
Connect to current sense resistor for bridge C.
Connect to second coil of bipolar stepper motor 2, or DC
motor winding.
Connect to current sense resistor for bridge D.
Serial data input
Serial input clock
Serial chip select
Serial data strobe
Reset input
Sleep input
Data is clocked in on rising edge of SCLK.
Logic high enables serial data to be clocked in.
Logic high latches serial data.
Active low resets serial interface and disables outputs.
Active low input disables outputs and charge pump.
Test inputs
Do not connect these pins - used for factory test only.
(1) Directions: I = input, O = output, OZ = 3-state output, OD = open-drain output, IO = input/output, PU = internal pullup
To Logic
Hysteresis
Internal
Pulldown
ESD
Figure 1. Logic Inputs
Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): DRV8823-Q1
Submit Documentation Feedback
3