66AK2H14 Datasheet, PDF (297/351 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

66AK2H14/12/06
Multicore DSP+ARM KeyStone II System-on-Chip (SoC)
SPRS866E—November 2013
Table 10-21 Reset Type Status Register Field Descriptions (Part 2 of 2)
Bit Field
Description
1
RESET
RESET reset
0 = RESET was not the last reset to occur
1 = RESET was the last reset to occur
0
POR
End of Table 10-21
Power-on reset
0 = Power-on reset was not the last reset to occur
1 = Power-on reset was the last reset to occur
10.5.2.7 Reset Control Register (RSTCTRL)
This register contains a key that enables writes to the MSB of this register and the RSTCFG register. The key value
is 0x5A69. A valid key will be stored as 0x000C. Any other key value is invalid. When the RSTCTRL or the RSTCFG
is written, the key is invalidated. Every write must be set up with a valid key. The Software Reset Control Register
(RSTCTRL) is shown in Figure 10-14 and described in Table 10-22.
Figure 10-14 Reset Control Register (RSTCTRL)
31
17
16
15
0
Reserved
R-0x0000
SWRST
R/W-0x ⁽¹⁾
KEY
R/W-0x0003
Legend: R = Read only; -n = value after reset;
1 Writes are conditional based on valid key.
Table 10-22 Reset Control Register Field Descriptions
Bit Field
Description
31-17 Reserved
Reserved
16 SWRST
Software reset
0 = Reset
1 = Not reset
15-0 KEY
End of Table 10-22
Key used to enable writes to RSTCTRL and RSTCFG.
10.5.2.8 Reset Configuration Register (RSTCFG)
This register is used to configure the type of reset (a hard reset or a soft reset) initiated by RESET, the watchdog
timer, and the Main PLL Controller’s RSTCTRL Register. By default, these resets are hard resets. The Reset
Configuration Register (RSTCFG) is shown in Figure 10-15 and described in Table 10-23.
Figure 10-15 Reset Configuration Register (RSTCFG)
31
14
13
12
11
4
3
0
Reserved
PLLCTLRSTTYPE RESETTYPE
Reserved
WDTYPE[N ⁽¹⁾]
R-0x000000
R/W-0 ⁽²⁾
R/W-0²
R-0x0
R/W-0x00²
Legend: R = Read only; R/W = Read/Write; -n = value after reset
1 Where N = 1, 2, 3,....N (Not all these outputs may be used on a specific device.)
2 Writes are conditional based on valid key. For details, see Section 10.5.2.7 ‘‘Reset Control Register (RSTCTRL)’’.
Copyright 2013 Texas Instruments Incorporated
Submit Documentation Feedback
66AK2H14/12/06 Peripheral Information and Electrical Specifications 297