English
Language : 

LM3S1627_16 Datasheet, PDF (290/727 Pages) Texas Instruments – Stellaris Microcontroller
Micro Direct Memory Access (μDMA)
Bit/Field
2:0
Name
XFERMODE
Type
R/W
Reset
-
Description
DMA Transfer Mode
Since this register is in system RAM, it has no reset value. Therefore,
this field should be initialized to 0 before the channel is enabled.
The operating mode of the DMA cycle. Refer to “Transfer
Modes” on page 268 for a detailed explanation of transfer modes.
Value Description
0x0 Stop
Channel is stopped, or configuration data is invalid.
0x1 Basic
The controller must receive a new request, prior to it entering
the arbitration process, to enable the DMA cycle to complete.
0x2 Auto-Request
The initial request (software- or peripheral-initiated) is sufficient
to complete the entire transfer of XFERSIZE items without any
further requests.
0x3 Ping-Pong
The controller performs a DMA cycle using one of the channel
control structures. After the DMA cycle completes, it performs
a DMA cycle using the other channel control structure. After the
next DMA cycle completes (and provided that the host processor
has updated the original channel control data structure), it
performs a DMA cycle using the original channel control data
structure. The controller continues to perform DMA cycles until
it either reads an invalid data structure or the host processor
changes this field to 0x1 or 0x2. See “Ping-Pong” on page 268.
0x4 Memory Scatter-Gather
When the controller operates in Memory Scatter-Gather mode,
you must only use this value in the primary channel control data
structure. See “Memory Scatter-Gather” on page 269.
0x5 Alternate Memory Scatter-Gather
When the controller operates in Memory Scatter-Gather mode,
you must only use this value in the alternate channel control
data structure.
0x6 Peripheral Scatter-Gather
When the controller operates in Peripheral Scatter-Gather mode,
you must only use this value in the primary channel control data
structure. See “Peripheral Scatter-Gather” on page 273.
0x7 Alternate Peripheral Scatter-Gather
When the controller operates in Peripheral Scatter-Gather mode,
you must only use this value in the alternate channel control
data structure.
7.6 μDMA Register Descriptions
The register addresses given are relative to the μDMA base address of 0x400F.F000.
290
July 17, 2014
Texas Instruments-Production Data