UCC5310 Datasheet, PDF (29/46 Pages) Texas Instruments – 4.3-A, 3-kVRMS Isolated Single-Channel Gate Drivers

www.ti.com
UCC5310, UCC5320
SLLSER8A – JUNE 2017 – REVISED JUNE 2017
P_GDO
4
mW
2
§
¨
© ¹²
:
||
12
4.5
:
:
||
4.5
2.2
:
:
1.5 :
0.65 :
0.65 : 0 :
1.5
:
·
¸
¹
|1.5
mW
(9)
Use Equation 10 to calculate the nonlinear pullup or pulldown resistor for case 2.
P_GDO
ª
T_{R _ Sys}
³ ^{2 u fSW u} _««^{4.3 A u}
V_CC2
«¬
0
V_OUTH(t) dt
T_{F _ Sys}
º
³ ^{4.4 A u}
V_OUTL
(t)dt
»
»
0
»¼
where
• V_OUTH/L(t) is the gate-driver OUTH and OUTL pin voltage during the turnon and turnoff period. In cases where
the output is saturated for some time, this value can be simplified as a constant-current source (4.3 A at turnon
and 4.4 A at turnoff) charging or discharging a load capacitor. Then, the V_OUTH/L(t) waveform will be linear and
the T_{R_Sys} and T_{F_Sys} can be easily predicted.
(10)
For some scenarios, if only one of the pullup or pulldown circuits is saturated and another one is not, the P_GDO is
a combination of case 1 and case 2, and the equations can be easily identified for the pullup and pulldown based
on this discussion.
Use Equation 11 to calculate the total gate-driver loss dissipated in the UCC53x0 gate driver, P_GD.
P_GD P_GDQ P_GDO 31 mW 1.5 mW 32.5 mW
(11)
9.2.2.4 Estimating Junction Temperature
Use Equation 12 to estimate the junction temperature (T_J) of the UCC53x0 family.
T_J T_C <_JT u P_GD
where
• T_C is the UCC53x0 case-top temperature measured with a thermocouple or some other instrument.
• Ψ_JT is the junction-to-top characterization parameter from the Thermal Information table.
(12)
Using the junction-to-top characterization parameter (Ψ_JT) instead of the junction-to-case thermal resistance
(R_θJC) can greatly improve the accuracy of the junction temperature estimation. The majority of the thermal
energy of most ICs is released into the PCB through the package leads, whereas only a small percentage of the
total energy is released through the top of the case (where thermocouple measurements are usually conducted).
The R_θJC resistance can only be used effectively when most of the thermal energy is released through the case,
such as with metal packages or when a heat sink is applied to an IC package. In all other cases, use of R_θJC will
inaccurately estimate the true junction temperature. The Ψ_JT parameter is experimentally derived by assuming
that the amount of energy leaving through the top of the IC will be similar in both the testing environment and the
application environment. As long as the recommended layout guidelines are observed, junction temperature
estimations can be made accurately to within a few degrees Celsius.
9.2.3 Selecting V_CC1 and V_CC2 Capacitors
Bypass capacitors for the V_CC1 and V_CC2 supplies are essential for achieving reliable performance. TI
recommends choosing low-ESR and low-ESL, surface-mount, multi-layer ceramic capacitors (MLCC) with
sufficient voltage ratings, temperature coefficients, and capacitance tolerances.
NOTE
DC bias on some MLCCs will impact the actual capacitance value. For example, a 25-V,
1-μF X7R capacitor is measured to be only 500 nF when a DC bias of 15-V_DC is applied.
9.2.3.1 Selecting a V_CC1 Capacitor
A bypass capacitor connected to the V_CC1 pin supports the transient current required for the primary logic and the
total current consumption, which is only a few milliamperes. Therefore, a 50-V MLCC with over 100 nF is
recommended for this application. If the bias power-supply output is located a relatively long distance from the
V_CC1 pin, a tantalum or electrolytic capacitor with a value greater than 1 μF should be placed in parallel with the
MLCC.
Copyright © 2017, Texas Instruments Incorporated
Product Folder Links: UCC5310 UCC5320
Submit Documentation Feedback
29