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AVCE6467T-3 Datasheet, PDF (281/352 Pages) Texas Instruments – VCE6467T, AVCE6467T Digital Media System-on-Chip
VCE6467T, AVCE6467T
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6.20.2 ATA Peripheral Register Description(s)
Table 6-89 shows the ATA registers.
HEX ADDRESS RANGE
0x01C6 6000
0x01C6 6002
0x01C6 6004
0x01C6 6008 - 0x01C6 603F
0x01C6 6040
0x01C6 6042 - 0x01C6 6046
0x01C6 6047
0x01C6 6048
0x01C6 604A
0x01C6 6050
0x01C6 6054
0x01C6 6058
0x01C6 605C
0x01C6 6060
0x01C6 6064
0x01C6 6068
0x01C6 606C
0x01C6 6070
0x01C6 6074
0x01C6 6078
0x01C6 607C - 0x01C6 67FF
Table 6-89. ATA Register Memory Map
ACRONYM
REGISTER NAME
ATA Bus Master Interface DMA Engine Registers
BMICP Primary IDE Channel DMA Control Register
BMISP Primary IDE Channel DMA Status Register
BMIDTP Primary IDE Channel DMA Descriptor Table Pointer Register
–
Reserved
ATA Configuration Registers
IDETIMP Primary IDE Channel Timing Register
–
Reserved
IDESTAT IDE Controller Status Register
UDMACTL Ultra-DMA Control Register
–
Reserved
MISCCTL Miscellaneous Control Register
REGSTB Task File Register Strobe Timing Register
REGRCVR Task File Register Recovery Timing Register
DATSTB Data Register Access PIO Strobe Timing Register
DATRCVR Data Register Access PIO Recovery Timing Register
DMASTB Multiword DMA Strobe Timing Register
DMARCVR Multiword DMA Recovery Timing Register
UDMASTB Ultra-DMA Strobe Timing Register
UDMATRP Ultra-DMA Ready-to-Pause Timing Register
UDMATENV Ultra-DMA Timing Envelope Register
IORDYTMP Primary I/O Ready Timer Configuration Register
–
Reserved
SPRS690 – MARCH 2011
Copyright © 2011, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications 281
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