TMS320C6711D_15 Datasheet, PDF (28/109 Pages) Texas Instruments – FLOATING-POINT DIGITAL SIGNAL PROCESSOR

TMS320C6711D
FLOATINGĆPOINT DIGITAL SIGNAL PROCESSOR
SPRS292B − OCTOBER 2005 − REVISED JUNE 2006
SIGNAL
NAME
HRDY
CE3
CE2
CE1
CE0
BE3
BE2
BE1
BE0
HOLDA
HOLD
BUSREQ
ECLKIN
ECLKOUT
Terminal Functions (Continued)
PIN
NO.
GDP/
ZDP
TYPE†
IPD/
IPU‡
DESCRIPTION
EMIF − CONTROL SIGNALS COMMON TO ALL TYPES OF MEMORY^¶ (CONTINUED)
H19
O
IPD Host ready (from DSP to host)
V6
O/Z
W6
O/Z
W18
O/Z
V17
O/Z
IPU
IPU ^{Memory space enables}
• Enabled by bits 28 through 31 of the word address
IPU _{• Only one asserted during any external data access}
IPU
V5
O/Z
IPU
Byte-enable control
Y4
O/Z
IPU _{• Decoded from the two lowest bits of the internal address}
U19
O/Z
IPU ^{• Byte-write enables for most types of memory}
V20
O/Z
IPU ^{• Can be directly connected to SDRAM read and write mask signal (SDQM)}
EMIF − BUS ARBITRATION^¶
J18
O
IPU Hold-request-acknowledge to the host
J17
I
IPU Hold request from the host
J19
O
IPU Bus request output
EMIF − ASYNCHRONOUS/SYNCHRONOUS MEMORY CONTROL^¶
Y11
I
IPD External EMIF input clock source
EMIF output clock depends on the EKSRC bit (DEVCFG.[4]) and on EKEN bit (GBLCTL.[5])
EKSRC = 0 – ECLKOUT is based on the internal SYSCLK3 signal
from the clock generator (default).
Y10
O/Z
IPD
EKSRC = 1 – ECLKOUT is based on the the external EMIF input clock
source pin (ECLKIN)
EKEN = 0 – ECLKOUT held low
EKEN = 1 – ECLKOUT enabled to clock (default)
ARE/SDCAS/
SSADS
V11
O/Z
IPU Asynchronous memory read enable/SDRAM column-address strobe/SBSRAM address strobe
AOE/SDRAS/
SSOE
W10
O/Z
IPU Asynchronous memory output enable/SDRAM row-address strobe/SBSRAM output enable
AWE/SDWE/
SSWE
V12
O/Z
IPU Asynchronous memory write enable/SDRAM write enable/SBSRAM write enable
ARDY
Y5
I
IPU Asynchronous memory ready input
† _{I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal (PLL Filter)}
‡ _{IPD = Internal pulldown, IPU = Internal pullup. [To oppose the supply rail on these IPD/IPU signal pins, use external pullup or pulldown resistors}
no greater than 4.4 kΩ and 2.0 kΩ, respectively.]
¶ _{To maintain signal integrity for the EMIF signals, serial termination resistors should be inserted into all EMIF output signal lines.}
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