TLC2272-Q1 Datasheet, PDF (28/39 Pages) Texas Instruments – ADVANCED LinCMOS™ RAIL-TO-RAIL OPERATIONAL AMPLIFIERS

TLC2272-Q1 , TLC2272A-Q1
TLC2274-Q1, TLC2274A-Q1
SGLS007E – FEBRUARY 2003 – REVISED JANUARY 2012
APPLICATION INFORMATION
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Macromodel Information
Macromodel information provided was derived using Microsim Parts, the model generation software used with
Microsim PSpice. The Boyle macromodel⁽²⁾ and subcircuit in Figure 59 are generated using the TLC227x typical
electrical and operating characteristics at T_A = 25°C. Using this information, output simulations of the following
key parameters can be generated to a tolerance of 20% (in most cases):
(2) G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers”, IEEE
Journal of Solid-State Circuits, SC-9, 353 (1974).
• Maximum positive output voltage swing
• Maximum negative output voltage swing
• Slew rate
• Quiescent power dissipation
• Input bias current
• Open-loop voltage amplification
• Unity-gain frequency
• Common-mode rejection ratio
• Phase margin
• DC output resistance
• AC output resistance
• Short-circuit output current limit
3
V_{CC +}
RP
2
IN −
IN +
1
V_{CC −}
RSS
ISS
10
DP
J1
J2
+
VC
R2
−
53
11
12
DC
RD1 ^C1 RD2
VAD
+
−
4
60
DE
54
−+
VE
.SUBCKT TLC227x 1 2 3 4 5
C1
11
1214E−12
C2
6
760.00E−12
DC
5
53DX
DE
54
5DX
DLP 90
91DX
DLN 92
90DX
DP
4
3DX
EGND 99
0POLY (2) (3,0) (4,) 0 .5 .5
FB
99
0POLY (5) VB VC VE VLP VLN 0
+ 984.9E3 −1E6 1E6 1E6 −1E6
GA
6
011 12 377.0E−6
GCM 0 6 10 99 134E−9
ISS
3
10DC 216.OE−6
HLIM 90
0VLIM 1K
J1
11
210 JX
J2
12
110 JX
R2
6
9100.OE3
99
EGND ₊
9
+
VB
−
FB
−
C2
6
GCM
GA
DIN
RO2 ⁹⁰
HLIM
+ _DIP
−
7
+
VLIM
−
8
91
+
VIP
−
92
−
VIN
+
RO1
5
OUT
RD1 60
112.653E3
RD2 60
122.653E3
R01
8
550
R02
7
9950
RP
3
44.310E3
RSS 10
99925.9E3
VAD 60
4−.5
VB
9
0DC 0
VC 3 53 DC .78
VE
54
4DC .78
VLIM 7
8DC 0
VLP
91
0DC 1.9
VLN 0
92DC 9.4
.MODEL DX D (IS=800.0E−18)
.MODEL JX PJF (IS=1.500E−12BETA=1.316E-3
+ VTO=−.270)
.ENDS
Figure 59. Boyle Macromodels and Subcircuit
28
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