OPA4684M Datasheet, PDF (28/32 Pages) Texas Instruments – QUAD LOW-POWER CURRENT-FEEDBACK OPERATIONAL AMPLIFIER

OPA4684M
QUAD LOWĆPOWER CURRENTĆFEEDBACK
OPERATIONAL AMPLIFIER
SGLS145B − AUGUST 2003 − REVISED FEBRUARY 2004
dc accuracy and offset control
A current-feedback op amp like the OPA4684 provides exceptional bandwidth in high gains, giving fast pulse
settling but only moderate DC accuracy. The Electrical Characteristics show an input offset voltage comparable
to high slew rate voltage-feedback amplifiers. However, the two input bias currents are somewhat higher and
are unmatched. Whereas bias current cancellation techniques are very effective with most voltage-feedback
op amps, they do not generally reduce the output DC offset for wideband current-feedback op amps. Since the
two input bias currents are unrelated in both magnitude and polarity, matching the source impedance looking
out of each input to reduce their error contribution to the output is ineffective. Evaluating the configuration of
Figure 41, using worst-case +25°C input offset voltage and the two input bias currents, gives a worst-case output
offset range equal to:
±(NG × VOS(MAX)) + (IBN × RS/2 × NG) ± (IBI × RF)
where NG = noninverting signal gain
= ±(2 × 4.0 mV) ± (13 µA × 25 Ω × 2) ± (800 Ω × 17 µA)
= ±8 mV + 0.65 mV ± 13.6 mV
= ±22.3 mV
While the last term, the inverting bias current error, is dominant in this low-gain circuit, the input offset voltage
will become the dominant DC error term as the gain exceeds 5 V/V. Where improved DC precision is required
in a high-speed amplifier, consider the OPA656 single and OPA2822 dual voltage-feedback amplifiers.
thermal analysis
The OPA4684 will not require external heatsinking or airflow most applications. Maximum desired junction
temperature will set the maximum allowed internal power dissipation as described below. In no case should the
maximum junction temperature be allowed to exceed 175°C.
Operating junction temperature (TJ) is given by T_A + P_D × θ_JA. The total internal power dissipation (PD) is the
sum of quiescent power (P_DQ) and additional power dissipated in the output stage (P_DL) to deliver load power.
Quiescent power is simply the specified no-load supply current times the total supply voltage across the part.
P_DL will depend on the required output signal and load but would, for a grounded resistive load, be at a maximum
when the output is fixed at a voltage equal to 1/2 either supply voltage (for equal bipolar supplies). Under this
condition P_DL = VS²/(4 × R_L) where R_L includes feedback network loading.
Note that it is the power in the output stage and not into the load that determines internal power dissipation.
As an absolute worst-case example, compute the maximum T_J using an OPA4684IPW (TSSOP-14 package)
in the circuit of Figure 41 operating at the maximum specified ambient temperature of +85°C with all channels
driving a grounded 100-Ω load to 2.5 V_DC.
P_D = 10 V × 7.8 mA + 4 × (5² /(4 × (100 Ω || 1.6 kΩ))) = 144 mW
Maximum T_J = +85°C + (0.144 W × 110°C/W) = 101°C.
This maximum operating junction temperature is well below most system level targets. Most applications will
be lower than this since an absolute worst-case output stage power was assumed in this calculation with all 4
channels running maximum output power simultaneously.
board layout guidelines
Achieving optimum performance with a high-frequency amplifier like the OPA4684 requires careful attention to
board layout parasitics and external component types. Recommendations that will optimize performance
include:
− Minimize parasitic capacitance to any AC ground for all of the signal I/O pins. Parasitic capacitance on
the output and inverting input pins can cause instability; on the noninverting input, it can react with the
source impedance to cause unintentional bandlimiting. To reduce unwanted capacitance, a window
around the signal I/O pins should be opened in all of the ground and power planes around those pins.
Otherwise, ground and power planes should be unbroken elsewhere on the board.
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