LM3S5747 Datasheet, PDF (270/890 Pages) Texas Instruments – Stellaris® LM3S5747 Microcontroller

Internal Memory
Table 7-3. Flash Register Map (continued)
Offset Name
Type
Reset
Description
0x014 FCMISC
R/W1C 0x0000.0000
Flash Memory Protection Registers (System Control Offset)
0x130 FMPRE0
R/W
0xFFFF.FFFF
0x200 FMPRE0
R/W
0xFFFF.FFFF
0x134 FMPPE0
R/W
0xFFFF.FFFF
0x400 FMPPE0
R/W
0xFFFF.FFFF
0x140 USECRL
R/W
0x31
0x1D0 USER_DBG
R/W
0xFFFF.FFFE
0x1E0 USER_REG0
R/W
0xFFFF.FFFF
0x1E4 USER_REG1
R/W
0xFFFF.FFFF
0x1E8 USER_REG2
R/W
0xFFFF.FFFF
0x1EC USER_REG3
R/W
0xFFFF.FFFF
0x204 FMPRE1
R/W
0xFFFF.FFFF
0x208 FMPRE2
R/W
0x0000.0000
0x20C FMPRE3
R/W
0x0000.0000
0x404 FMPPE1
R/W
0xFFFF.FFFF
0x408 FMPPE2
R/W
0x0000.0000
0x40C FMPPE3
R/W
0x0000.0000
Flash Controller Masked Interrupt Status and Clear
Flash Memory Protection Read Enable 0
Flash Memory Protection Read Enable 0
Flash Memory Protection Program Enable 0
Flash Memory Protection Program Enable 0
USec Reload
User Debug
User Register 0
User Register 1
User Register 2
User Register 3
Flash Memory Protection Read Enable 1
Flash Memory Protection Read Enable 2
Flash Memory Protection Read Enable 3
Flash Memory Protection Program Enable 1
Flash Memory Protection Program Enable 2
Flash Memory Protection Program Enable 3
See
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7.5 ROM Register Descriptions (System Control Offset)
This section lists and describes the ROM Controller registers, in numerical order by address offset.
Registers in this section are relative to the System Control base address of 0x400F.E000.
270
November 17, 2011
Texas Instruments-Production Data