OPA192-Q1 Datasheet, PDF (27/42 Pages) Texas Instruments – 36-V, Precision, Rail-to-Rail Input/Output, Low-Offset Voltage, Low-Input Bias Current Op Amp With e-trim

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50
45
40
35
+
VIN
30
-
25
+ 18 V
-
OP A192-Q1
+
-18 V
RISO
CL
20
R_ISO = 00Ω
15
R_ISO = 25 2Ω5
10
R_ISO = 50 Ω50
5
0
10p
100p
1n
Capacitive Load (F)
Figure 60. Small-Signal Overshoot vs Capacitive Load
(100-mV Output Step)
OPA192-Q1, OPA2192-Q1, OPA4192-Q1
SBOS850 – MAY 2017
50
45
40
+
35
VIN
-
30
+ 18 V
-
OPA192-Q1
+
-18 V
RISO
RL
CL
25
20
15
10
5
0
10p
R_ISO = 0 Ω0
R_ISO = 2255Ω
R_ISO = 5500Ω
100p
1n
Capacitive Load (F)
Figure 61. Small-Signal Overshoot vs Capacitive Load
(100-mV Output Step)
For additional drive capability in unity-gain configurations, improve capacitive load drive by inserting a small
(10 Ω to 20 Ω) resistor, R_ISO, in series with the output, as shown in Figure 62. This resistor significantly reduces
ringing and maintains dc performance for purely capacitive loads. However, if a resistive load is in parallel with
the capacitive load, then a voltage divider is created, thus introducing a gain error at the output and slightly
reducing the output swing. The error introduced is proportional to the ratio R_ISO / R_L, and is generally negligible at
low output levels. A high capacitive load drive makes the OPAx192-Q1 well suited for applications such as
reference buffers, MOSFET gate drives, and cable-shield drives. The circuit shown in Figure 62 uses an isolation
resistor, R_ISO, to stabilize the output of an op amp. R_ISO modifies the open-loop gain of the system for increased
phase margin, and results using the OPAx192-Q1 are summarized in Table 3. For additional information on
techniques to optimize and design using this circuit, TI Precision Design TIDU032 details complete design goals,
simulation, and test results.
+V_s
R_iso
V_out
+
V_{in ±}
-V_s
C_load
Figure 62. Extending Capacitive Load Drive with the OPAx192-Q1
Table 3. OPAx192-Q1 Capacitive Load Drive Solution Using Isolation Resistor Comparison of
Calculated and Measured Results
PARAMETER
Capacitive Load
Phase Margin
R_ISO (Ω)
Measured
Overshoot (%)
Calculated PM
100 pF
45°
60°
47
360
23.2 8.6
10.4
45.1°
58.1°
1000 pF
45°
60°
24
100
22.5
9.0
45.8°
59.7°
VALUE
0.01 µF
45°
60°
20
51
22.1
8.7
46.1°
60.1°
0.1 µF
45°
60°
6.2
15.8
23.1
8.6
45.2°
60.2°
1 µF
45°
60°
2
4.7
21
8.6
47.2°
60.2°
For step-by-step design procedure, circuit schematics, bill of materials, printed circuit board (PCB) files,
simulation results, and test results, refer to TI Precision Design TIDU032, Capacitive Load Drive Solution using
an Isolation Resistor .
Copyright © 2017, Texas Instruments Incorporated
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