OPA140 Datasheet, PDF (27/44 Pages) Texas Instruments – 11-MHz JFET Op Amp

www.ti.com
10.2 Layout Example
OPA140, OPA2140, OPA4140
SBOS498B – JULY 2010 – REVISED NOVEMBER 2015
RIN
VIN
RG
+
RF
VOUT
(Schematic Representation)
Run the input traces
as far away from
the supply lines
as possible
Place components
close to device and to
each other to reduce
parasitic errors
RG
GND
RF
NC
±IN
VIN
+IN
RIN
V±
NC
V+
OUT
NC
VS+
GND
Use low-ESR, ceramic
bypass capacitor
Only needed for
dual-supply
operation
GND
VS±
(or GND for single supply)
VOUT
Ground (GND) plane on another layer
Figure 42. Operational Amplifier Board Layout for Noninverting Configuration
Copyright © 2010–2015, Texas Instruments Incorporated
Submit Documentation Feedback
27
Product Folder Links: OPA140 OPA2140 OPA4140