DLPA2005 Datasheet, PDF (27/55 Pages) Texas Instruments – Power Management and LED/Lamp Driver IC

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DLPA2005
DLPS047B – SEPTEMBER 2014 – REVISED OCTOBER 2015
Table 3. Device State as a Function of Control-Pin
Status
PROJ_ON PIN
LOW
HIGH
STATE
OFF
STANDBY
ACTIVE1
ACTIVE2
(Device state depends on
DMD_EN and VLED_EN bits
and whether there are any
fault conditions.)
Table 4. Modes of Operation
MODE
OFF
STANDBY
ACTIVE1
ACTIVE2
DESCRIPTION
This is the lowest-power mode of operation. All power functions are turned off, registers are reset to their default values, and
the IC does not respond to SPI commands. RESETZ pin is pulled low. The IC will enter OFF mode whenever the PROJ_ON
pin is low.
The DMD regulators and LED power (VLED) are turned off, but the IC does respond to the SPI. The device enters STANDBY
mode whenever PROJ_ON is set high or DMD_EN⁽¹⁾ bit is set to 0 using the SPI interface after PROJ_ON is already high.
The device also enters STANDBY mode when a fault condition is detected⁽²⁾. (See Protection Circuits .)
The DMD supplies are enabled but LED power (VLED) is disabled. PROJ_ON pin must be high, DMD_EN bit must be set to
1, and VLED_EN⁽³⁾ bit is set to 0.
DMD supplies and LED power are enabled. PROJ_ON pin must be high and DMD_EN and VLED_EN bits must both be set
to 1.
(1) Settings can be done through Reg01h [9] and Reg2E [119]
(2) Power-good faults, over-voltage, overtemperature shutdown, and undervoltage lockout
(3) Settings can be done through Reg47h [60], bit is named VLED_EN_SET
7.5 Register Maps
Table 5. Register Description
REGISTE ADDRESS
R
(Hex)
NAME
TABLE
USER CONFIGURATION DEFINITIONS
R
0x00 CHIP ID
Table 6
R/W
0x01 CHIPENABLE Table 7
R/W
0x02 IREG
Table 8
R/W
0x03 SW4MSB
Table 9
R/W
0x04 SW4LSB
Table 10, Table 11
R/W
0x05 SW5MSB
Table 12
R/W
0x06 SW5LSB
Table 13, Table 14
R/W
0x07 SW6MSB
Table 15
R/W
0x08 SW6LSB
Table 16, Table 17
R/W
0x09 SWCNTRL
Table 18
R/W
0x0A AFE
Table 19
R/W
0x0B BBM
Table 20, Table 21
R
0x0C INT
Table 22, Table 23
R/W
0x0D INT MASK
Table 24, Table 25
R/W
0x0E TIMING
Table 26, Table 27
USER PROTECTED DEFINITION
R/W
0x10 PASSWORD Table 28
R/W
0x11 SYSTEM
Table 29
USER EEPROM SCRATCH PAD DEFINITION
R/W
0x20 BYTE0
Table 31
DESCRIPTION
Chip Revision Register; DLPA2005
Enable Register
Transient-current limit settings
Regulation current MSB, SW4
Regulation current LSB, SW4
Regulation current MSB, SW5
Regulation current LSB, SW5
Regulation current MSB, SW6
Regulation current LSB, SW6
Switch ON/OFF control (direct mode)
AFE (MUX) control
Break Before Make timing
Interrupt register
Interrupt Mask register
Timing register VOFS, VBIAS, VRST, and RESETZ
Password register
System Configuration register
User EEPROM, Byte0
DEFAULT
C4
0F
30
0
0
0
0
0
0
0
0
0
0
DFh
7
0
0
0
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