TMS320VC5441_17 Datasheet, PDF (26/91 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

Functional Overview
Memory Map with OVLY = 1
0000h
Page 0 Page 1 Page 2 Page 3
MPDC
8000h
MDC0
or
MDC1
FFFFh
Data Memory
MPDC
MPDC
MPDC MPDC
MPCD0 MPCD1 MPCD2 MPCD3
Program Memory
Memory Map with OVLY = 0
0000h
Page 0 Page 1 Page 2 Page 3
MPDC
MPCD3 MPCD3 MPCD3 MPCD3
8000h
MDC0
or
MDC1
FFFFh
Data Memory
MPCD0
MPCD1
MPCD2 ^{ÒÒÒÒÒÒÒÒ}
Program Memory
ÒÒ^{: reserved}
NOTES: A. MPDC: local program/data memory in subsystem C
B. MDC: local data memory in subsystem C. MDC is controlled by the data memory map register (DMMR).
DMMR=0, MDC0 is mapped in 8000h − FFFFh.
DMMR=1, MDC1 is mapped in 8000h − FFFFh.
C. MPCD: shared program memory in subsystems C and D
Figure 3−5. Subsystem C CPU Memory Map
26 SPRS122F
December 1999 − Revised October 2008