ADS8691 Datasheet, PDF (26/73 Pages) Texas Instruments – 18-Bit, High-Speed, Single-Supply, SAR ADC Data Acquisition System with Programmable, Bipolar Input Ranges

ADS8691, ADS8695, ADS8699
SBAS777 – DECEMBER 2016
www.ti.com
7.3.6 ADC Driver
In order to meet the performance of the device at the maximum sampling rate, the sample-and-hold capacitors at
the input of the ADC must be successfully charged and discharged during the acquisition time window. This drive
requirement at the input of the ADC necessitates the use of a high-bandwidth, low-noise, and stable amplifier
buffer. Such an input driver is integrated in the front-end signal path of the analog input channel of the device.
7.3.7 Reference
The device can operate with either an internal voltage reference or an external voltage reference using the
internal buffer. The internal or external reference selection is determined by programming the INTREF_DIS bit of
the RANGE_SEL_REG register. The internal reference source is enabled (INTREF_DIS = 0) by default after
reset or when the device powers up. The INTREF_DIS bit must be programmed to logic 1 to disable the internal
reference source whenever an external reference source is used.
7.3.7.1 Internal Reference
The device features an internal reference source with a nominal output value of 4.096 V. In order to select the
internal reference, the INTREF_DIS bit of the RANGE_SEL_REG register must be programmed to logic 0. When
the internal reference is used, the REFIO pin becomes an output with the internal reference value. A 4.7-µF
(minimum) decoupling capacitor is recommended to be placed between the REFIO pin and REFGND, as shown
in Figure 53. The capacitor must be placed as close to the REFIO pin as possible. The output impedance of the
internal band-gap circuit creates a low-pass filter with this capacitor to band-limit the noise of the reference. The
use of a smaller capacitor value allows higher reference noise in the system that can potentially degrade SNR
and SINAD performance. The REFIO pin must not be used to drive external ac or dc loads because of limited
current output capability. The REFIO pin can be used as a source if followed by a suitable op amp buffer (such
as the OPA320).
AVDD
4.096 VREF
RANGE_SEL_REG[6] = 0
(INTREF_DIS)
REFIO
REFCAP
4.7 PF
ADC
REFGND
AGND
1 PF
10 PF
Figure 53. Device Connections for Using an Internal 4.096-V Reference
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