ADS8372 Datasheet, PDF (26/36 Pages) Texas Instruments – 16-BIT, 600-kHz, FULLY DIFFERENTIAL PSEUDO-BIPOLAR INPUT, MICROPOWER SAMPLING ANALOG-TO-DIGITAL CONVERTER WITH SERIAL INTERFACE AND REFERENCE

ADS8372
SLAS451 – JUNE 2005
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LAYOUT (continued)
As with the AGND connections, +VA should be connected to a +5-V power-supply plane or trace that is
separate from the connection for digital logic until they are connected at the power entry point. Power to the
ADS8372 should be clean and well bypassed. A 0.1-µF ceramic bypass capacitor should be placed as close to
the device as possible. See Table 3 for the placement of these capacitors. In addition, a 1-µF capacitor is
recommended. In some situations, additional bypassing may be required, such as a 100-µF electrolytic capacitor
or even a Pi filter made up of inductors and capacitors—all designed to essentially low-pass filter the +5-V
supply, removing the high frequency noise.
Table 3. Power Supply Decoupling Capacitor Placement
SUPPLY PINS
Pair of pins requiring a shortest
path to decoupling capacitors
Pins requiring no decoupling
CONVERTER ANALOG SIDE
(2,3); (5,6); (15,16); (17,18)
CONVERTER DIGITAL SIDE
(20,21)
1, 4, 14, 19
When using the internal reference, ensure a shortest path from REFOUT (pin 9) to REFIN (pin 8) with the
bypass capacitor directly between pins 8 and 7.
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