THS4531A_16 Datasheet, PDF (25/59 Pages) Texas Instruments – Ultra Low-Power, Rail-to-Rail Output, Fully Differential Amplifier

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THS4531A
SLOS823C – DECEMBER 2012 – REVISED JANUARY 2016
Feature Description (continued)
8.3.1.1 Setting the Output Common-Mode Voltage
The output common-model voltage is set by the voltage at the V_OCM pin and the internal circuit works to maintain
the output common-mode voltage as close as possible to this voltage. If left unconnected, the output common-
mode is set to mid-supply by internal circuitry, which may be over-driven from an external source. Figure 67 is
representative of the V_OCM input. The internal V_OCM circuit has about 24-MHz of –3-dB bandwidth, which is
required for best performance, but it is intended to be a DC bias input pin. Bypass capacitors are recommended
on this pin to reduce noise. Use Equation 2 to calculate the external current required to overdrive the internal
resistor divider.
I_EXT
=
( 2V_OCM - V_S+ +
625 kΩ
V_S- )
where
• V_OCM is the voltage applied to the V_OCM pin.
(2)
V_S+
Internal
V_OCM Circuit
625 kΩ ^IEXT
V_OCM
625 kΩ
V_S–
Figure 67. Simplified V_OCM Input Circuit
8.3.2 Power Down
The power down pin is internally connected to a CMOS stage which must be driven to a minimum of 2.1 V to
ensure proper high logic.
VS+
ESD Cell
PD
ESD Cell
To
transistor
bases
VS±
Figure 68. Simplified Power-Down Internal Circuit
If 1.8-V logic is used to drive the pin, a shoot through current of up to 100 µA may develop in the digital logic
causing the overall quiescent current to exceed the 2 uA of maximum disabled quiescent current specified in the
Electrical Characteristics: V_S = 2.7 V.
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