SN74V245-EP Datasheet, PDF (25/42 Pages) Texas Instruments – DSP-SYNC FIRST-IN, FIRST-OUT MEMORY

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WCLK
tCLKH
tCLKL
SN74V245-EP
SCAS932A – DECEMBER 2012 – REVISED JANUARY 2013
WEN
HF
RCLK
tENS
D/2 Words in FIFO,
(see Notes A and B)
D–1 ₊₁
2
Words in FIFO
(see Notes A and C)
tENH
D/2+1 Words in FIFO,
(see Notes A and B)
tHF
Words in FIFO
D – 1 _{+ 2 (see Notes A}
2
and C)
D/2 Words in FIFO,
(see Notes A and B)
D–1 ₊₁
2
Words in FIFO
(see Notes A
and C)
tHF
REN
tENS
NOTES: A. D = maximum FIFO depth
In FWFT mode: D = 4097
In standard mode: D = 4096
B. For standard mode
C. For FWFT mode
D. Select single-device mode by setting (FL, RXI, WXI) = (0,0,0), (0,0,1), (0,1,0), (1,0,0), (1,0,1) or (1,1,0) during reset.
Figure 13. Half-Full-Flag Timing (Standard and FWFT Modes)
WCLK
tCLKH
See
Note A
tXO
WXO
tENS
WEN
NOTE A: Write to last physical location.
Figure 14. Write-Expansion-Out Timing
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