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ADC10731_14 Datasheet, PDF (25/34 Pages) Texas Instruments – 10-Bit Plus Sign Serial I/O A/D Converters with Mux, Sample/Hold and Reference
ADC10731, ADC10732, ADC10734, ADC10738
www.ti.com
SNAS081D – MAY 1999 – REVISED MARCH 2013
The Input Sample and Hold
The ADC10731/2/4/8's sample/hold capacitor is implemented in the capacitor array. After the channel address is
loaded, the array is switched to sample the selected positive analog input. The sampling period for the assigned
positive input is maintained for the duration of the acquisition time (tA) 4.5 clock cycles.
This acquisition window of 4.5 clock cycles is available to allow the voltage on the capacitor array to settle to the
positive analog input voltage. Any change in the analog voltage on a selected positive input before or after the
acquisition window will not effect the A/D conversion result.
In the simplest case, the array's acquisition time is determined by the RON (3 kΩ) of the multiplexer switches, the
stray input capacitance CS1 (3.5 pF) and the total array (CL) and stray (CS2) capacitance (48 pF). For a large
source resistance the analog input can be modeled as an RC network as shown in Figure 42. The values shown
yield an acquisition time of about 1.1 μs for 10-bit unipolar or 10-bit plus sign accuracy with a zero-to-full-scale
change in the input voltage. External source resistance and capacitance will lengthen the acquisition time and
should be accounted for. Slowing the clock will lengthen the acquisition time, thereby allowing a larger external
source resistance.
Figure 42. Analog Input Model
The signal-to-noise ratio of an ideal A/D is the ratio of the RMS value of the full scale input signal amplitude to
the value of the total error amplitude (including noise) caused by the transfer function of the ideal A/D. An ideal
10-bit plus sign A/D converter with a total unadjusted error of 0 LSB would have a signal-to-(noise + distortion)
ratio of about 68 dB, which can be derived from the equation:
S/(N + D) = 6.02(n) + 1.76
(4)
where S/(N + D) is in dB and n is the number of bits.
Note: Diodes are 1N914.
Note: The protection diodes should be able to withstand the output current of the op amp under current limit.
Figure 43. Protecting the Analog Inputs
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