TCA6408A Datasheet, PDF (24/35 Pages) Texas Instruments – LOW-VOLTAGE 8-BIT I2C AND SMBus I/O EXPANDER WITH INTERRUPT OUTPUT, RESET, AND CONFIGURATION REGISTERS

TCA6408A
SCPS192C – APRIL 2009– REVISED JULY 2009............................................................................................................................................................. www.ti.com
Power-On Reset Requirements
In the event of a glitch or data corruption, TCA6408A can be reset to its default conditions by using the power-on
reset feature. Power-on reset requires that the device go through a power cycle to be completely reset. This
reset also happens when the device is powered on for the first time in an application.
The two types of power-on reset are shown in Figure 17 and Figure 18.
V_CC
Ramp-Up
Ramp-Down
Re-Ramp-Up
t_{TRR_GND}
Time
Time to Re-Ramp
t_RT
t_FT
t_RT
Figure 17. V_CC is Lowered Below 0.2 V or 0 V and Then Ramped Up to V_CC
V_CC
Ramp-Down
V_IN drops below POR levels
t_{TRR_VPOR50}
Ramp-Up
Time to Re-Ramp
t_FT
t_RT
Time
Figure 18. V_CC is Lowered Below the POR Threshold, Then Ramped Back Up to V_CC
Table 2 specifies the performance of the power-on reset feature for TCA6408A for both types of power-on reset.
Table 2. RECOMMENDED SUPPLY SEQUENCING AND RAMP RATES AT T_A = 25°C⁽¹⁾
PARAMETER
MIN TYP MAX
t_FT
t_RT
t_{RR_GND}
t_{RR_POR50}
V_{CC_GH}
t_GW
V_PORF
V_PORR
Fall rate
Rise rate
Time to re-ramp (when V_CC drops to GND)
Time to re-ramp (when V_CC drops to V_{POR_MIN} – 50 mV)
Level that V_CCP can glitch down to, but not cause a functional
disruption when V_{CCX_GW} = 1 µs
Glitch width that will not cause a functional disruption when
V_{CCX_GH} = 0.5 × V_CCx
Voltage trip point of POR on falling V_CC
Voltage trip point of POR on fising V_CC
See Figure 17
See Figure 17
See Figure 17
See Figure 18
See Figure 19
See Figure 19
0.1
2000
0.1
2000
1
1
1.2
10
0.7
1.4
(1) Not tested. Specified by design.
UNIT
ms
ms
µs
µs
V
µs
V
V
24
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