OPA836 Datasheet, PDF (24/49 Pages) Texas Instruments – Very Low-Power, Rail-to-Rail Out, Negative Rail In, VFB Op Amp

OPA836
OPA2836
SLOS712D – JANUARY 2011 – REVISED OCTOBER 2011
V_REF
V_SIG
V_REF
V_S+
RG
VIN
OPA 836
V_S-
V_OUT
GV_SIG
V_REF
R_F
Figure 54. Inverting Amplifier
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Attenuators
The non-inverting circuit of Figure 53 has minimum gain of 1. To implement attenuation, a resistor divider can be
placed in series with the positive input, and the amplifier set for gain of 1 by shorting V_OUT to V_IN- and removing
R_G. Since the op amp input is high impedance, the attenuation is set by the resistor divider.
The inverting circuit of Figure 54 can be used as an attenuator by making R_G larger than R_F. The attenuation is
simply the resistor ratio. For example a 10:1 attenuator can be implemented with R_F = 1 kΩ and R_G = 10 kΩ.
Single Ended to Differential Amplifier
Figure 55 shows an amplifier circuit that is used to convert single-ended signals to differential, and provides gain
and level shifting. This circuit can be used for converting signals to differential in applications like line drivers for
CAT 5 cabling or driving differential input SAR and ΔΣ ADCs.
By setting V_IN = V_REF + V_SIG, then
V
OUT+
=
G
x
V_IN
+
V_REF
and
V
OUT-
=
-G
x
V_IN
+
V_REF
Where: G = 1 + ^RF
R_G
(3)
The differential signal gain of the circuit is 2x G, and V_REF provides a reference around which the output signal
swings. The differential output signal is in-phase with the single ended input signal.
VSIG
VREF
RO
R1
OPA 836
2R
2R
V_IN
+
VREF
VREF
RO
RG
RF
OPA 836
R
Figure 55. Single Ended to Differential Amplifier
G x VSIG
VOUT+ VREF
-G x V SIG
VOUT- VREF
Line termination on the output can be accomplished with resistors R_O. The impedance seen differential from the
line will be 2x R_O. For example if 100 Ω CAT 5 cable is used with double termination, the amplifier is typically set
for a differential gain of 2 V/V (6 dB) with R_F = 0 Ω (short) R_G = ∞Ω (open), 2R = 1 kΩ, R1 = 0 Ω, R = 499 Ω to
balance the input bias currents, and R_O = 49.9 Ω for output line termination. This configuration is shown in
Figure 56.
For driving a differential input ADC the situation is similar, but the output resistors, R_O, are typically chosen along
with a capacitor across the ADC input for optimum filtering and settling time performance.
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