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BQ24745_14 Datasheet, PDF (24/39 Pages) Texas Instruments – SMBus-Controlled Multi-Chemistry Battery
bq24745
SLUS761D – DECEMBER 2007 – REVISED OCTOBER 2011
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CONVERTER OPERATION
The synchronous buck PWM converter uses a fixe- frequency (300 kHz) voltage mode with feed-forward control
scheme. A type-III compensation network allows using ceramic capacitors at the output of the converter. The
compensation input stage is connected between the feedback output (FBO) and the error amplifier input (EAI).
The feedback compensation stage is connected between the error amplifier input (EAI) and error amplifier output
(EAO). The LC output filter selected gives a characteristic resonant frequency that is used to determine the
compensation to ensure there is sufficient phase margin for the target bandwidth.
The
resonant
frequency,
fo,
is
given
by:
fo
+
2p
1
ǸLoCo
An internal sawtooth ramp is compared to the internal EAO error control signal to vary the duty cycle of the
converter. The ramp height is one-fifteenth of the input adapter voltage, making it always directly proportional to
the input adapter voltage. This cancels out any loop gain variation due to a change in input voltage, and
simplifies the loop compensation. The ramp is offset by 200 mV in order to allow zero-percent duty cycle when
the EAO signal is below the ramp. The EAO signal is also allowed to exceed the sawtooth ramp signal in order to
get a 100% duty-cycle PWM request. Internal gate-drive logic allows achieving 99.98% duty cycle while ensuring
the N-channel upper device always has enough voltage to stay fully on. If the BOOT pin to PHASE pin voltage
falls below 4 V for more than three cycles, then the high-side n-channel power MOSFET is turned off and the
low-side n-channel power MOSFET is turned on to pull the PHASE node down and recharge the BOOT
capacitor. Then the high-side driver returns to 100% duty-cycle operation until the (BOOT-PHASE) voltage is
detected to fall low again due to leakage current discharging the BOOT capacitor below 4 V, and the recharge
pulse is reissued.
The fixed-frequency oscillator keeps tight control of the switching frequency under all conditions of input voltage,
battery voltage, charge current, and temperature, simplifying output filter design and keeping the frequency out of
the audible noise region. The type-III compensation provides phase boost near the cross-over frequency, giving
sufficient phase margin.
CONTINUOUS AND DISCONTINUOUS CONDUCTION MODES
In continuous-conduction mode (CCM), the inductor current always flows to charge the battery, and the charger
always operates in synchronized mode. At the beginning of each clock cycle, the high-side n-channel power
MOSFET turns on, and the turnon time is set by the voltage on EAO pin. After the high-side power MOSFET
turns off, the low-side n-channel power MOSFET turns on. During CCM, the low-side n-channel power MOSFET
stays on until the end of the clock cycle. The internal gate-drive logic ensures there is break-before-make
switching to prevent shoot-through currents. During the 25-ns dead time where both FETs are off, the back diode
of the low-side power MOSFET conducts the inductor current. Having the low-side FET turn on keeps the power
dissipation low, and allows safely charging at high currents. With type-III compensation, the loop has a fixed
2-pole system.
Before the ripple valley current gets close to zero, the low-side FET must turn off before current goes negative,
or flows from the battery to the PHASE node, to avoid battery boosting the system. After the high-side n-channel
power MOSFET turns off, and after the break-before-make dead-time, the low-side n-channel power MOSFET
turns on for a blank-out time. After the blank-out time is over, if the VCSOP-CSON voltage falls below the UCP
threshold (typical 10 mV), the low-side power MOSFET turns off and stays off until the beginning of the next
cycle, where the high-side power MOSFET is turned on again. After the low-side MOSFET turns off, the inductor
current flows through back-gate diode until it reaches zero. The negative inductor current is blocked by the diode,
and the inductor current becomes discontinuous. This mode is called discontinuous-conduction mode (DCM).
During the DCM mode, the loop response automatically changes and has a single-pole system at which the pole
is proportional to the load current, because the converter does not sink current, and only the load provides a
current sink. This means at very low currents the loop response is slower, as there is less sinking current
available to discharge the output voltage. At very low currents during non-synchronous operation, there may be a
small amount of negative inductor current during the 40-ns recharge pulse. The charge should be low enough to
be absorbed by the input capacitance.
Whenever the converter goes into zero percent duty-cycle, the high-side MOSFET does not turn on, and the
low-side MOSFET does not turn on (no 40-ns recharge pulse) either, and there is no discharge from the battery
unless the BOOT to PHASE voltage discharges below 4 V. In that case, it pulses once to recharge the bootstrap
capacitor.
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