ADS5292_13 Datasheet, PDF (24/67 Pages) Texas Instruments – Octal Channel 12-Bit, 80 MSPS and Low-Power ADC

ADS5292
SLAS788B – NOVEMBER 2011 – REVISED JULY 2012
www.ti.com
TYPICAL CHARACTERISTICS (continued)
Typical values are at 25°C, AVDD = 1.8 V, LVDD = 1.8 V, 50% clock duty cycle, –1 dBFS differential analog input, 12Bit/80
MSPS, ADC is configured in the internal reference mode, unless otherwise noted.
0
0
HPF_DISABLED
SNR = 70.3 dBFS
−10
HPF_ENABLED
−10
SINAD = 69.9 dBFS
−20
SFDR = 81.6 dBc
−20
THD = 80 dBc
−30
−30
−40
−50
−40
−60
−50
−70
−60
−80
−90
−100
−110
−120
−130
−70
−80
−90
−100
−110
−140
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
Input Signal Frequency (MHz)
−120
0
5 10 15 20 25 30 35 40
Frequency (MHz)
Figure 36. FFT with HPF Enabled and Disabled, No Signal
Figure 37. FFT (Full-Band) for 5 MHz Input Signal, Sample
Rate = 80 MSPS with Low Frequency Noise Suppression
Enabled
0
−10
−20
−30
−40
−50
−60
−70
−80
−90
−100
−110
−120
−130
−140
0
LF noise suppression enabled
LF noise suppression disabled
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Frequency (MHz)
Figure 38. FFT (0 to 1 MHz) for 5 MHz Input Signal, Sample
Rate = 80 MSPS with Low Frequency Noise Suppression
Enabled
0
LF noise suppression enabled
−10
LF noise suppression disabled
−20
−30
−40
−50
−60
−70
−80
−90
−100
−110
−120
−130
−140
39 39.1 39.2 39.3 39.4 39.5 39.6 39.7 39.8 39.9 40
Frequency (MHz)
Figure 39. FFT (39 MHz to 40 MHz) for 5 MHz Input Signal,
Sample Rate = 80 MSPS with Low Frequency Noise
Suppression Enabled
24
Submit Documentation Feedback
Product Folder Link(s) :ADS5292
Copyright © 2011–2012, Texas Instruments Incorporated