THS4601_14 Datasheet, PDF (23/32 Pages) Texas Instruments – WIDEBAND, FET-INPUT OPERATIONAL AMPLIFIER

THS4601
SLOS388B − OCTOBER 2001 − REVISED JUNE 2002
APPLICATION INFORMATION
PowerPAD design considerations (continued)
DIE
Side View (a)
DIE
Thermal
Pad
End View (b)
Bottom View (c)
NOTE A: The thermal pad is electrically isolated from all terminals in the package.
Figure 41. Views of Thermally Enhanced Package
Although there are many ways to properly heatsink the PowerPAD package, the following steps illustrate the
recommended approach.
Thermal pad area (68 mils x 70 mils) with 5 vias
(Via diameter = 13 mils)
Figure 42. PowerPAD PCB Etch and Via Pattern
PowerPAD PCB LAYOUT CONSIDERATIONS
1. Prepare the PCB with a top side etch pattern as shown in Figure 42. There should be etch for the leads as
well as etch for the thermal pad.
2. Place five vias in the area of the thermal pad. These holes should be 13 mils in diameter. Keep them small
so that solder wicking through the holes does not occur during reflow.
3. Additional vias may be placed anywhere along the thermal plane outside of the thermal pad area. This helps
dissipate the heat generated by the IC. These additional vias may be larger than the 13-mil diameter vias
directly under the thermal pad. Larger vias are permissible here because they are not susceptible to solder
wicking as the vias underneath the device.
4. Connect all vias to the internal ground plane for best thermal characteristics
5. When connecting these holes to the ground plane, do not use the typical web or spoke via connection
methodology. Web connections have a high thermal resistance connection that is useful for slowing the heat
transfer during soldering operations. This makes the soldering of vias that have plane connections easier.
In this application, however, low thermal resistance is desired for the most efficient heat transfer. Therefore,
the holes under the PowerPAD package should make their connection to the internal ground plane with a
complete connection around the entire circumference of the plated-through hole.
6. The top-side solder mask should leave the terminals of the package and the thermal pad area with its five
holes exposed. The bottom-side solder mask should cover the five holes of the thermal pad area. This
prevents solder from being pulled away from the thermal pad area during the reflow process.
7. Apply solder paste to the exposed thermal pad area and all of the IC terminals.
8. With these preparatory steps in place, the IC is simply placed in position and run through the solder reflow
operation as any standard surface-mount component. This results in a part that is properly installed.
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