THS4601_14 Datasheet, PDF (13/32 Pages) Texas Instruments – WIDEBAND, FET-INPUT OPERATIONAL AMPLIFIER

THS4601
SLOS388B − OCTOBER 2001 − REVISED JUNE 2002
APPLICATION INFORMATION
designing the transimpedance circuit (continued)
As indicated, the current source typically sets the requirements for gain, speed, and dynamic range of the
amplifier. For a given amplifier and source combination, achievable performance is dictated by the following
parameters: the amplifier’s gain-bandwidth product, the amplifier’s input capacitance, the source capacitance,
the transimpedance gain, the amplifier’s slew rate, and the amplifier’s output swing. From this information, the
optimal performance of a transimpedance circuit using a given amplifier can be determined. Optimal is defined
here as providing the required transimpedance gain with a maximally flat frequency response.
For the circuit shown in Figure 26, all but one of the design parameters is known; the feedback capacitor must
be determined. Proper selection of the feedback capacitor prevents an unstable design, controls pulse
response characteristics, provides maximally flat transimpedance bandwidth, and limits broadband integrated
noise. The maximally flat frequency response results with C_F calculated as shown in equation 1, where C_F is
the feedback capacitor, R_F is the feedback resistor, C_S is the total source capacitance (including amplifier input
capacitance and parasitic capacitance at the inverting node), and GBP is the gain-bandwidth product of the
amplifier in hertz.
Ǹǒ Ǔ ¹
pRFGBP
)
2
1
pRFGBP
)
4CS
pRFGBP
(1)
CF +
2
Once the optimal feedback capacitor has been selected, the transimpedance bandwidth can be calculated with
equation 2.
Ǹ ^{F–3 dB +}
GBP
2pR_F ^ǒC_S ) C_F^Ǔ
(2)
CICM
CIDIFF
CP
+
_
RF
IDIODE
CD
CF
C_s = C_ICM + C_IDIFF + C_P + C_D
Where: C_ICM is the common-mode input capacitance.
C_IDIFF is the differential input capacitance.
C_D is the diode capacitance.
C_P is parasitic capacitance at the inverting node.
NOTE: The total source capacitance is the sum of several distinct capacitances.
Figure 27. Transimpedance Analysis Circuit
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