TPS54418A Datasheet, PDF (22/40 Pages) Texas Instruments – 2.95-V to 6-V Input, 4-A Output, 2-MHz , Synchronous Step-Down Switcher With Integrated FETs (SWIFT™)

TPS54418A
SLVSC75A – AUGUST 2013 – REVISED SEPTEMBER 2016
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The desired response to a large change in the load current is the first criteria. The output capacitor needs to
supply the load with current when the regulator cannot. This situation would occur if there are desired hold-up
times for the regulator where the output capacitor must hold the output voltage above a certain level for a
specified amount of time after the input power is removed. The regulator is temporarily not able to supply
sufficient output current if there is a large, fast increase in the current needs of the load such as transitioning
from no load to a full load. The regulator usually needs two or more clock cycles for the control loop to see the
change in load current and output voltage and adjust the duty cycle to react to the change. The output capacitor
must be sized to supply the extra current to the load until the control loop responds to the load change. The
output capacitance must be large enough to supply the difference in current for two clock cycles while only
allowing a tolerable amount of droop in the output voltage. Equation 25 shows the necessary minimum output
capacitance.
For this example, the transient load response is specified as a 3% change in V_OUT for a load step from 1 A (50%
load) to 2 A (100%).
ΔI_OUT = 2 –1 = 1 A
(23)
ΔV_OUT = 0.03 × 1.8 = 0.054 V
(24)
Using these numbers gives a minimum capacitance of 37 μF. This value does not take the ESR of the output
capacitor into account in the output voltage change. For ceramic capacitors, the ESR is usually small enough to
ignore in this calculation.
Equation 26 calculates the minimum output capacitance needed to meet the output voltage ripple specification.
Where f_SW is the switching frequency, V_RIPPLE is the maximum allowable output voltage ripple, and I_RIPPLE is the
inductor ripple current. In this case, the maximum output voltage ripple is 30 mV. Equation 26 yields 5.2 µF.
C_{OUT (transient}
)
>
2×
f_SW ×
I_IOUT
V_OUT
(25)
C_{OUT (ripple}
)
>
8
×
f_SW
I_Ripple
× V_OUT
(ripple
)
(26)
where
• ΔI_OUT is the load step size
• ΔV_OUT is the acceptable output deviation
• f_SW is the switching frequency
• I_Ripple is the inductor ripple current
• V_OUT(Ripple) is the acceptable DC output voltage ripple
Equation 27 calculates the maximum ESR an output capacitor can have to meet the output voltage ripple
specification. Equation 27 indicates the ESR should be less than 57 mΩ. In this case, the ESR of the ceramic
capacitor is much less than 57 mΩ.
Additional capacitance de-ratings for aging, temperature and DC bias should be factored in which increases this
minimum value. For this example, two 22-μF, 10-V, X5R ceramic capacitors with 3 mΩ of ESR are used.
Capacitors generally have limits to the amount of ripple current they can handle without failing or producing
excess heat. An output capacitor that can support the inductor ripple current must be specified. Some capacitor
data sheets specify the RMS (root mean square) value of the maximum ripple current. Equation 28 can be used
to calculate the RMS ripple current the output capacitor needs to support. For this application, Equation 28 yields
333 mA.
R_ESR
< ^{VOUT (ripple )}
I_Ripple
(27)
( ) ^VOUT ^{´ V}IN₍max₎ ^{- V}OUT
I_CO(rms) = _{12 ´VIN(max) ´ L1´ fSW}
(28)
22
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