TLC59208F Datasheet, PDF (22/37 Pages) Texas Instruments – 8-BIT FM+ I2C BUS LED DRIVER

TLC59208F
SCLS715A – MARCH 2009 – REVISED NOVEMBER 2015
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9.6.1.4 Group Duty Cycle Control Register (GRPPWM)
Table 7 describes the Group Duty Cycle Control Register .
Table 7. GRPPWM – Group Duty Cycle Control Register (Address 0Ah) Bit Description
ADDRESS REGISTER
BIT
0Ah
GRPPWM
7:0
SYMBOL
GDC0[7:0]
ACCESS ⁽¹⁾
VALUE DESCRIPTION
R/W
1111 1111⁽²⁾ GRPPWM register
(1) R = read, W = write
(2) Default value
When DMBLNK bit (MODE2 register) is programmed with logic 0, a 190-Hz fixed frequency signal is
superimposed with the 97-kHz individual brightness control signal. GRPPWM is then used as a global brightness
control allowing the LED outputs to be dimmed with the same value. The value in GRPFREQ is then a ‘Don’t
care’.
General brightness for the 8 outputs is controlled through 256 linear steps from 00h (0% duty cycle = LED output
off) to FFh (99.6% duty cycle = maximum brightness). Applicable to LED outputs programmed with LDRx = 11
(LEDOUT0 and LEDOUT1 registers).
When DMBLNK bit is programmed with logic 1, GRPPWM and GRPFREQ registers define a global blinking
pattern, where GRPPWM and GRPFREQ registers define a global blinking pattern, where GRPFREQ contains
the blinking period (from 24 Hz to 10.73 s) and GRPPWM the duty cycle (ON/OFF ratio in %).
GDC[7:0]
duty cycle = 256
9.6.1.5 Group Frequency Register (GRPFREQ)
Table 7 describes the Group Frequency Register.
ADDRESS
0Bh
Table 8. GRPFREQ – Group Frequency Register (Address 0Bh) Bit Description
REGISTER
BIT
SYMBOL ACCESS⁽¹⁾
VALUE DESCRIPTION
GRPFREQ
7:0
GFRQ[7:0]
R/W
0000 0000⁽²⁾ GRPFREQ register
(1) R = read, W = write
(2) Default value
GRPFREQ is used to program the global blinking period when DMBLNK bit (MODE2 register) is equal to 1.
Value in this register is a ‘Don’t care’ when DMBLNK = 0. Applicable to LED output programmed with LDRx = 11
(LEDOUT0 and LEDOUT1 registers).
Blinking period is controlled through 256 linear steps from 00h (41 ms, frequency 24 Hz) to FFh (10.73 s).
globalblinkingperiod =
GFRQ[7:0]
24
+
1(s)
9.6.1.6 LED Driver Output State Registers (LEDOUT0, LEDOUT1)
Table 9 describes the LED Driver Output State Registers.
Table 9. LEDOUT0 and LEDOUT1 – LED Driver Output State Registers (Address 0Ch and 0Dh) Bit
Descriptions
ADDRESS REGISTER
BIT
7:6
5:4
0Ch
LEDOUT0
3:2
1:0
SYMBOL
LDR3[1:0]
LDR2[1:0]
LDR1[1:0]
LDR0[1:0]
ACCESS ⁽¹⁾
R/W
VALUE
00 ⁽²⁾
00 ⁽²⁾
00 ⁽²⁾
00 ⁽²⁾
DESCRIPTION
LED3 output state control
LED2 output state control
LED1 output state control
LED0 output state control
(1) R = read, W = write
(2) Default value
22
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