TLC59208F Datasheet, PDF (11/37 Pages) Texas Instruments – 8-BIT FM+ I2C BUS LED DRIVER

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Feature Description (continued)
1 2 3 4 5 6 7 8 9 10 11 12
TLC59208F
SCLS715A – MARCH 2009 – REVISED NOVEMBER 2015
508 510 512 508 510 512
507 508 511 507 508 511 1 2 3 4 5 6 7 8 9 10 11
M X 256 X 2 X 40 ns
with M = (0 to 255)
(GRPPWM Register)
N X 40 ns with
N = (0 to 255)
(PWMx Register)
258 X 40 ns = 10.24 µs
(97.6 kHz)
Group Dimming Signal
12 3 4 5 6 7 8
256 X 2 X 256 X 40 ns = 5.24 ms (190.7 Hz)
12 3 4 5 6 7 8
Resulting Brightness + Group Dimming Signal
A. Minimum pulse width for LEDn brightness control is 40 ns.
B. Minimum pulse width for group dimming is 20.48 μs.
C. When M = 1 (GRPPWM register value), the resulting LEDn brightness control and group dimming signal will have two
pulses of the LED brightness control signal (pulse width = N × 40 ns,w ith N defined in the PWMx register).
D. The resulting brightness plus group dimming signal shown above demonstrate a resulting control signal with M = 4 (8
pulses).
Figure 7. Brightness + Group Dimming Signals
9.4 Device Functional Modes
Active
Active mode occurs when one or more of the output channels is enabled.
Standby
Standby mode occurs when all output channels are disabled. Standby mode may be entered either
through I2C command or by pulling the RESET pin low.
9.5 Programming
9.5.1 Characteristics of the I²C Bus
The I²C bus is for two-way two-line communication between different devices or modules. The two lines are a
serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a
pullup resistor when connected to the output stages of a device. Data transfer may be initiated only when the bus
is not busy.
9.5.1.1 Bit Transfer
One data bit is transferred during each clock pulse. The data on the SDA line must remain stable during the high
period of the clock pulse as changes in the data line at this time will be interpreted as control signals (see
Figure 8).
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