THS6062IDR Datasheet, PDF (22/36 Pages) Texas Instruments – LOW-NOISE ADSL DUAL DIFFERENTIAL RECEIVER

THS6062
SLOS228D – JANUARY 1999 – REVISED OCTOBER 2007
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DRIVING A CAPACITIVE LOAD
Driving capacitive loads with high performance amplifiers is not a problem as long as certain precautions are
taken. The first is to realize that the THS6062 has been internally compensated to maximize its bandwidth and
slew rate performance. When the amplifier is compensated in this manner, capacitive loading directly on the
output will decrease the device's phase margin leading to high frequency ringing or oscillations. Therefore, for
capacitive loads of greater than 10 pF, it is recommended that a resistor be placed in series with the output of
the amplifier, as shown in Figure 45. A minimum value of 20 Ω should work well for most applications. For
example, in 75-Ω transmission systems, setting the series resistor value to 75 Ω both isolates any capacitance
loading and provides the proper line impedance matching at the source end.
360 Ω
Input
360 Ω
_
THS6062
+
20 Ω
Output
C_LOAD
Figure 45. Driving a Capacitive Load
OFFSET VOLTAGE
The output offset voltage, (V_OO) is the sum of the input offset voltage (V_IO) and both input bias currents (I_IB) times
the corresponding gains. The following schematic and formula are used to calculate the output offset voltage:
Figure 46. Output Offset Voltage Model
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