LMC6482_15 Datasheet, PDF (22/39 Pages) Texas Instruments – CMOS Dual Rail-to-Rail Input and Output Operational Amplifier

LMC6482
SNOS674E – NOVEMBER 1997 – REVISED APRIL 2015
Application Information (continued)
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8.2 Typical Applications
8.2.1 3-V Single Supply Buffer Circuit
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Figure 59. 3-V Single Supply Buffer Circuit
8.2.1.1 Design Requirements
For best performance, ensure that the input voltage swing is between V+ and V-.
Ensure that the input does not exceed the common-mode input range.
To reduce the risk of destabilizing the output, use resistive isolation on the output when driving capacitive loads
(see the Detailed Design Procedure section).
When large feedback resistors are used, it may be necessary to compensate for parasitic capacitance on the
input. See the Detailed Design Procedure section.
8.2.1.2 Detailed Design Procedure
8.2.1.2.1 Capacitive Load Compensation
Capacitive load compensation can be accomplished using resistive isolation as shown in Figure 60. This simple
technique is useful for isolating the capacitive inputs of multiplexers and A/D converters.
Figure 60. Resistive Isolation of a 330-pF Capacitive Load
Figure 61. Pulse Response of the LMC6482 Circuit in Figure 60
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