LM3S1435_16 Datasheet, PDF (22/670 Pages) Texas Instruments – Stellaris LM3S1435 Microcontroller

Table of Contents
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
I²C Master Control/Status (I2CMCS), offset 0x004 ........................................................... 519
I²C Master Data (I2CMDR), offset 0x008 ......................................................................... 523
I²C Master Timer Period (I2CMTPR), offset 0x00C ........................................................... 524
I²C Master Interrupt Mask (I2CMIMR), offset 0x010 ......................................................... 525
I²C Master Raw Interrupt Status (I2CMRIS), offset 0x014 ................................................. 526
I²C Master Masked Interrupt Status (I2CMMIS), offset 0x018 ........................................... 527
I²C Master Interrupt Clear (I2CMICR), offset 0x01C ......................................................... 528
I²C Master Configuration (I2CMCR), offset 0x020 ............................................................ 529
I²C Slave Own Address (I2CSOAR), offset 0x800 ............................................................ 531
I²C Slave Control/Status (I2CSCSR), offset 0x804 ........................................................... 532
I²C Slave Data (I2CSDR), offset 0x808 ........................................................................... 534
I²C Slave Interrupt Mask (I2CSIMR), offset 0x80C ........................................................... 535
I²C Slave Raw Interrupt Status (I2CSRIS), offset 0x810 ................................................... 536
I²C Slave Masked Interrupt Status (I2CSMIS), offset 0x814 .............................................. 537
I²C Slave Interrupt Clear (I2CSICR), offset 0x818 ............................................................ 538
Analog Comparator ..................................................................................................................... 539
Register 1: Analog Comparator Masked Interrupt Status (ACMIS), offset 0x000 .................................. 544
Register 2: Analog Comparator Raw Interrupt Status (ACRIS), offset 0x004 ....................................... 545
Register 3: Analog Comparator Interrupt Enable (ACINTEN), offset 0x008 ......................................... 546
Register 4: Analog Comparator Reference Voltage Control (ACREFCTL), offset 0x010 ....................... 547
Register 5: Analog Comparator Status 0 (ACSTAT0), offset 0x020 ..................................................... 548
Register 6: Analog Comparator Control 0 (ACCTL0), offset 0x024 ..................................................... 549
Pulse Width Modulator (PWM) .................................................................................................... 551
Register 1: PWM Master Control (PWMCTL), offset 0x000 ................................................................ 560
Register 2: PWM Time Base Sync (PWMSYNC), offset 0x004 ........................................................... 561
Register 3: PWM Output Enable (PWMENABLE), offset 0x008 .......................................................... 562
Register 4: PWM Output Inversion (PWMINVERT), offset 0x00C ....................................................... 563
Register 5: PWM Output Fault (PWMFAULT), offset 0x010 ................................................................ 564
Register 6: PWM Interrupt Enable (PWMINTEN), offset 0x014 ........................................................... 565
Register 7: PWM Raw Interrupt Status (PWMRIS), offset 0x018 ........................................................ 566
Register 8: PWM Interrupt Status and Clear (PWMISC), offset 0x01C ................................................ 567
Register 9: PWM Status (PWMSTATUS), offset 0x020 ...................................................................... 568
Register 10: PWM0 Control (PWM0CTL), offset 0x040 ....................................................................... 569
Register 11: PWM0 Interrupt and Trigger Enable (PWM0INTEN), offset 0x044 .................................... 571
Register 12: PWM0 Raw Interrupt Status (PWM0RIS), offset 0x048 .................................................... 574
Register 13: PWM0 Interrupt Status and Clear (PWM0ISC), offset 0x04C ........................................... 575
Register 14: PWM0 Load (PWM0LOAD), offset 0x050 ....................................................................... 576
Register 15: PWM0 Counter (PWM0COUNT), offset 0x054 ................................................................ 577
Register 16: PWM0 Compare A (PWM0CMPA), offset 0x058 ............................................................. 578
Register 17: PWM0 Compare B (PWM0CMPB), offset 0x05C ............................................................. 579
Register 18: PWM0 Generator A Control (PWM0GENA), offset 0x060 ................................................ 580
Register 19: PWM0 Generator B Control (PWM0GENB), offset 0x064 ................................................ 583
Register 20: PWM0 Dead-Band Control (PWM0DBCTL), offset 0x068 ................................................ 586
Register 21: PWM0 Dead-Band Rising-Edge Delay (PWM0DBRISE), offset 0x06C ............................. 587
Register 22: PWM0 Dead-Band Falling-Edge-Delay (PWM0DBFALL), offset 0x070 ............................. 588
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July 15, 2014
Texas Instruments-Production Data