LM3S2U93 Datasheet, PDF (213/1200 Pages) Texas Instruments – Stellaris® LM3S2U93 Microcontroller

Stellaris^® LM3S2U93 Microcontroller
Bit/Field
12
11
10:6
Name
reserved
BYPASS
XTAL
Type
RO
R/W
R/W
Reset
1
1
0x0B
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
PLL Bypass
Value Description
1 The system clock is derived from the OSC source and divided
by the divisor specified by SYSDIV.
0 The system clock is the PLL output clock divided by the divisor
specified by SYSDIV.
See Table 5-5 on page 192 for programming guidelines.
Note: The ADC must be clocked from the PLL or directly from a
16-MHz clock source to operate properly.
Crystal Value
This field specifies the crystal value attached to the main oscillator. The
encoding for this field is provided below. Depending on the crystal used,
the PLL frequency may not be exactly 400 MHz, see Table
25-8 on page 1134 for more information.
Value Crystal Frequency (MHz) Not Crystal Frequency (MHz) Using
Using the PLL
the PLL
0x00
1.000 MHz
reserved
0x01
1.8432 MHz
reserved
0x02
2.000 MHz
reserved
0x03
2.4576 MHz
reserved
0x04
3.579545 MHz
0x05
3.6864 MHz
0x06
4 MHz
0x07
4.096 MHz
0x08
4.9152 MHz
0x09
5 MHz
0x0A
5.12 MHz
0x0B
6 MHz (reset value)
0x0C
6.144 MHz
0x0D
7.3728 MHz
0x0E
8 MHz
0x0F
8.192 MHz
0x10
10.0 MHz
0x11
12.0 MHz
0x12
12.288 MHz
0x13
13.56 MHz
0x14
14.31818 MHz
0x15
16.0 MHz
0x16
16.384 MHz
January 23, 2012
213
Texas Instruments-Production Data