TPS43340-Q1_15 Datasheet, PDF (21/44 Pages) Texas Instruments – Quad-Output Power Supply

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TPS43340-Q1
SLVSB16E – NOVEMBER 2011 – REVISED DECEMBER 2015
Device Functional Modes (continued)
7.4.1.4 Current-Mode Operation
Peak current-mode control regulates the peak current through the inductor such that the output voltage maintains
its set value. The error between the feedback voltage at VSENSEx and the internal reference produces a signal
at the output of the error amplifier (COMPx) which serves as the target for the peak inductor current. This target
provides a comparison for the current through the inductor, sensed as a differential voltage at S1-S2 for Buck1
and S3-S4 for Buck2, and compared with this target during each cycle. A fall or rise in load current produces a
rise or fall in voltage at VSENSEx, causing COMPx to fall or rise, respectively, thus increasing or decreasing the
current through the inductor until the average current matches the load. In this way, the device maintains the
output voltage in regulation.
The high-side N-channel MOSFET turns on at the beginning of each clock cycle and remains on until the
inductor current reaches its peak value. Once this MOSFET turns off, and after a small delay (shoot-through
delay), the lower N-channel MOSFET turns on until the start of the next clock cycle. In dropout operation, the
high-side MOSFET stays on continuously. In every fourth clock cycle, the duty cycle is limited to 95% in order to
charge the bootstrap capacitor at BOOTx. This allows a maximum duty cycle of 98.75% for the buck regulators.
Thus, during dropout the buck regulators switch at one-fourth of the normal frequency.
7.4.1.5 Current Sensing and Current Limit With Foldback
Clamping the maximum value of COMPx is such as to limit the maximum current through the inductor to a
specified value. When the output of the buck regulator (and hence the feedback value at VSENSEx) falls to a low
value due to a short circuit or overcurrent condition, the clamping voltage at the COMPx successively decreases,
thus providing current foldback protection. This protects the high-side external MOSFET from excess current
(forward-direction current limit).
Similarly, if due to a fault condition the output shorts to a high voltage and turns the low-side MOSFET fully on,
the COMPx node drops low. The device holds COMPx at a low level as well in order to limit the maximum
current in the low-side MOSFET (reverse direction current limit).
An external resistor senses the current through the inductor. Choose the sense resistor such that the maximum
forward peak current in the inductor generates a voltage of 75 mV across the sense pins. This value specification
is at low duty cycles only. At typical duty cycle conditions around 40% (assuming 5-V output and 12-V input),
50 mV is a more reasonable value, considering the slope compensation and tolerances. The typical
characteristics in Figure 18 and Figure 12 provide a guide for using the correct current-limit sense voltage.
The current-sense pins Sx are high-impedance pins with low leakage across the entire output range. These pin
characteristics allow DCR current sensing using the dc resistance of the inductor for higher efficiency. Figure 17
shows DCR sensing. Here the series resistance (DCR) of the inductor serves as the sense element. Place the
filter components close to the device for noise immunity. Remember that while DCR sensing gives high
efficiency, it is less accurate due to the temperature sensitivity and a wide variation of the parasitic series
resistance of the inductor. Hence, it may often be advantageous to use the more-accurate sense resistor for
current sensing.
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