OPA3695_14 Datasheet, PDF (21/39 Pages) Texas Instruments – Triple, Ultra-Wideband, Current-Feedback OPERATIONAL AMPLIFIER with Disable

OPA3695
www.ti.com ............................................................................................................................................... SBOS355A – APRIL 2008 – REVISED SEPTEMBER 2008
BOARD LAYOUT GUIDELINES
Achieving optimum performance with a
high-frequency amplifier such as the OPA3695
requires careful attention to PCB layout parasitics and
external component types. Recommendations that
optimize OPA3695 performance include:
a) Minimize parasitic capacitance to any ac ground
for all of the signal I/O pins. Parasitic capacitance on
the output can cause instability; on the noninverting
input, it can react with the source impedance to
cause unintentional bandlimiting. To reduce
unwanted capacitance, create a window around the
signal I/O pins in all of the ground and power planes
around those pins. Otherwise, ground and power
planes should be unbroken elsewhere on the board.
b) Minimize the distance (< 0.25” or 6,35mm) from
the power-supply pins to high-frequency 0.1µF
decoupling capacitors. At the device pins, the ground
and power-plane layout should not be in close
proximity to the signal I/O pins. Avoid narrow power
and ground traces to minimize inductance between
the pins and the decoupling capacitors. The
power-supply connections should always be
decoupled with these capacitors. Larger (2.2µF to
6.8µF) decoupling capacitors, effective at lower
frequency, should also be used on the supply pins.
These capacitors may be placed somewhat farther
from the device and may be shared among several
devices in the same area of the PCB.
c) Careful selection and placement of external
components preserve the high-frequency
performance of the OPA3695. Use resistors that
have low reactance at high frequencies.
Surface-mount resistors work best and allow a tighter
overall layout. Metal film and carbon composition
axially-leaded resistors can also provide good
high-frequency performance. Again, keep the leads
and PCB trace length as short as possible. Never use
wirewound type resistors in a high-frequency
application. The output pin and inverting input pin are
the most sensitive to parasitic capacitance; therefore,
always position the series output resistor, if any, as
close as possible to the output pin. Other network
components, such as noninverting input termination
resistors, should also be placed close to the package.
Where double-side component mounting is allowed,
place the feedback resistor directly under the
package on the other side of the board between the
output and inverting input pins. The frequency
response is primarily determined by the feedback
resistor value, as described previously. Increasing its
value reduces the bandwidth, while decreasing it
gives a more peaked frequency response. The 604Ω
feedback resistor (used in the typical performance
specifications at a gain of +2V/V on ±5V supplies) is
a good starting point for design. Note that a 909Ω
feedback resistor, rather than a direct short, is
required for the unity-gain follower application. A
current-feedback op amp requires a feedback
resistor—even in the unity-gain follower
configuration—to control stability. Good axial metal
film or surface-mount resistors have approximately
0.2pF in shunt with the resistor. For resistor values
greater than 2.0kΩ, this parasitic capacitance can
add a pole and/or zero below 400MHz that can affect
circuit operation. Keep resistor values as low as
possible consistent with load driving considerations.
d) Connections to other wideband devices on the
PCB may be made with short direct traces or through
onboard transmission lines. For short connections,
consider the trace and the input to the next device as
a lumped capacitive load. Relatively wide traces
(50mils to 100mils, or 1,27mm to 2,54mm) should be
used, preferably with ground and power planes
opened up around them. Estimate the total capacitive
load and set R_S from the plot of Recommended R_S vs
Capacitive Load (Figure 33). Low parasitic capacitive
loads (< 4pF) may not need an R_S because the
OPA3695 is nominally compensated to operate with a
2pF parasitic load. If a long trace is required, and the
6dB signal loss intrinsic to a doubly-terminated
transmission line is acceptable, implement a matched
impedance transmission line using microstrip or
stripline techniques (consult an ECL design handbook
for microstrip and stripline layout techniques). A 50Ω
environment is normally not necessary on board, and
in fact, a higher impedance environment improves
distortion, as shown in the distortion versus load
plots. With a characteristic board trace impedance
defined based on board material and trace
dimensions, a matching series resistor into the trace
from the output of the OPA3695 is used, as well as a
terminating shunt resistor at the input of the
destination device. Remember also that the
terminating impedance is the parallel combination of
the shunt resistor and the input impedance of the
destination device; this total effective impedance
should be set to match the trace impedance. If the
6dB attenuation of a doubly-terminated transmission
line is unacceptable, a long trace can be
series-terminated at the source end only. Treat the
trace as a capacitive load in this case and set the
series resistor value as illustrated in the plot of
Figure 33. This configuration does not preserve signal
integrity as well as a doubly-terminated line. If the
input impedance of the destination device is low,
there will be some signal attenuation as a result of
the voltage divider formed by the series output into
the terminating impedance.
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): OPA3695
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