OPA3695_14 Datasheet, PDF (18/39 Pages) Texas Instruments – Triple, Ultra-Wideband, Current-Feedback OPERATIONAL AMPLIFIER with Disable

OPA3695
SBOS355A – APRIL 2008 – REVISED SEPTEMBER 2008 ............................................................................................................................................... www.ti.com
dissipation to < 1W for an output short while
decreasing the available output voltage swing only
0.5V, for up to 100mA desired load currents. Always
place the 0.1µF power-supply decoupling capacitors
after these supply-current limiting resistors directly on
the device supply pins.
DRIVING CAPACITIVE LOADS
One of the most demanding, and yet very common,
load conditions for an op amp is capacitive loading.
Often, the capacitive load is the input of an ADC,
including additional external capacitance, which may
be recommended to improve ADC linearity. A
high-speed, high open-loop gain amplifier such as the
OPA3695 can be very susceptible to decreased
stability and may give closed-loop response peaking
when a capacitive load is placed directly on the
output pin. When the amplifier open-loop output
resistance is considered, this capacitive load
introduces an additional pole in the signal path,
resulting in a feedback path zero that can decrease
the phase margin. Several external solutions to this
problem have been suggested. When the primary
considerations are frequency response flatness,
pulse response fidelity, and/or distortion, the simplest
and most effective solution is to isolate the capacitive
load from the feedback loop by inserting a series
isolation resistor between the amplifier output and the
capacitive load. The isolation acts to reduce the
phase lag from the capacitive load pole, thus
increasing the phase margin and improving stability.
The Typical Characteristics show a Recommended
R_S vs Capacitive Load curve (Figure 33) to help the
designer pick a value to give < 0.5dB peaking to the
load. The resulting frequency response curves show
a 0.5dB peaked response for several selected
capacitive loads and recommended R_S combinations.
Parasitic capacitive loads greater than 2pF can begin
to degrade the performance of the OPA3695. Long
PCB traces, unmatched cables, and connections to
other amplifier inputs can easily exceed this value.
Always consider this effect carefully and add the
recommended series resistor as close as possible to
the OPA3695 output pin (see the Board Layout
Guidelines section).
The criterion for setting this R_S resistor is a maximum
bandwidth, flat frequency response at the load
(< 0.5dB peaking). For the OPA3695 operating at a
gain of +2V/V, the frequency response at the output
pin is flat to begin with, allowing relatively small
values of R_S to be used for low capacitive loads.
DISTORTION PERFORMANCE
The OPA3695 provides good distortion performance
into a 100Ω load on ±5V supplies. Relative to
alternative solutions, the OPA3695 holds much lower
distortion at higher frequencies (> 20MHz) than
alternative solutions. Generally, until the fundamental
signal reaches very high-frequency or power levels,
the second harmonic dominates the distortion with a
negligible third-harmonic component. Focusing then
on the second harmonic, increasing the load
impedance improves distortion directly. Remember
that the total load includes the feedback network—in
the noninverting configuration (see Figure 35), this
value is the sum of R_F + R_G, while in the inverting
configuration it is only R_F (see Figure 36). Also,
providing an additional supply decoupling capacitor
(0.01µF) between the supply pins (for bipolar
operation) improves the second-order distortion
slightly (3dB to 6dB).
The OPA3695 has very low third-order harmonic
distortion—especially with high gains. This feature
also produces a high two-tone, third-order
intermodulation intercept. Two graphs for this
intercept are given in the in the Typical
Characteristics; one for ±5V and one for +5V. The
curves shown in each graph is defined at the 50Ω
load when driven through a 50Ω matching resistor, to
allow direct comparisons to RF MMIC devices.
The intercept is used to predict the intermodulation
spurious levels for two closely-spaced frequencies. If
the two test frequencies (f₁ and f₂) are specified in
terms of average and delta frequency, f_O = (f₁ + f₂)/2
and Δf = |f₂ – f₁|/2, then the two, 3rd-order, close-in
spurious tones appear at f_O ±3 × Δf. The difference
between two equal test tone power levels and these
intermodulation spurious power levels is given by
ΔdBc = 2 × (IM₃ – P_O), where IM₃ is the intercept
taken from the Typical Characteristics and P_O is the
power level in dBm at the 50Ω load for one of the two
closely-spaced test frequencies. For instance, at
40MHz, the OPA3695 at a gain of +8V/V has an
intercept of 35dBm at a matched 50Ω load. If the full
envelope of the two frequencies must be 2V_PP at this
load, this requires each tone to be 4dBm (1V_PP). The
third-order intermodulation spurious tones is then 2 ×
(35 – 4) = 62dBc below the test tone power level
(–79dBm).
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