LT1013_16 Datasheet, PDF (21/36 Pages) Texas Instruments – Dual Precision Operational Amplifier

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LT1013, LT1013D, LT1013M, LT1013AM
SLOS018I – MAY 1988 – REVISED JULY 2016
Typical Application (continued)
8.2.3 Application Curve
2
VIN
1.5
VOUT
1
0.5
0
-0.5
-1
-1.5
-2
0
0.5
1
1.5
2
Time (ms)
Figure 28. Input and Output Voltages of the Inverting Amplifier
9 Power Supply Recommendations
CAUTION
Supply voltages larger than 44 V for a single supply, or outside the range of ±22 V for
a dual supply can permanently damage the device (see Absolute Maximum Ratings).
Place 0.1-µF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or high
impedance power supplies. For more detailed information on bypass capacitor placement, see Layout.
10 Layout
10.1 Layout Guidelines
For best operational performance of the device, use quality PCB layout practices, including:
• Noise can propagate into analog circuitry through the power pins of the circuit as a whole, as well as the
operational amplifier. Bypass capacitors are used to reduce the coupled noise by providing low impedance
power sources local to the analog circuitry.
– Connect low-ESR, 0.1-µF ceramic bypass capacitors between each supply pin and ground, placed as
close to the device as possible. A single bypass capacitor from V+ to ground is applicable for single-
supply applications.
• Separate grounding for analog and digital portions of circuitry is one of the simplest and most effective
methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes.
A ground plane helps distribute heat and reduces EMI noise pickup. Make sure to physically separate digital
and analog grounds, paying attention to the flow of the ground current.
• Run the input traces as far away from the supply or output traces as possible to reduce parasitic coupling. If it
is not possible to keep them separate, it is much better to cross the sensitive trace perpendicular as opposed
to in parallel with the noisy trace.
• Place the external components as close to the device as possible. Keeping RF and RG close to the inverting
input minimizes parasitic capacitance, as shown in Layout Guidelines.
• Keep the length of input traces as short as possible. Always remember that the input traces are the most
sensitive part of the circuit.
• Consider a driven, low-impedance guard ring around the critical traces. A guard ring can significantly reduce
leakage currents from nearby traces that are at different potentials.
Copyright © 1988–2016, Texas Instruments Incorporated
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