ADC12DL065 Datasheet, PDF (21/35 Pages) National Semiconductor (TI) – Dual 12-Bit, 65 MSPS, 3.3V, 360mW A/D Converter

ADC12DL065
www.ti.com
SNAS249D – MARCH 2005 – REVISED APRIL 2013
Signal Inputs
The signal inputs are V_IN A+ and V_INA− for one ADC and V_INB+ and V_INB− for the other ADC . The input signal,
V_IN, is defined as
V_IN A = (V_INA+) – (V_INA−)
(3)
for the "A" converter and
V_IN B = (V_INB+) – (V_INB−)
(4)
for the "B" converter. Figure 36 shows the expected input signal range. Note that the common mode input
voltage, V_CM, should be in the range of 0.5V to 2.0V.
The peaks of the individual input signals should each never exceed 2.6V.
The ADC12DL065 performs best with a differential input signal with each input centered around a common mode
voltage, V_CM. The peak-to-peak voltage swing at each analog input pin should not exceed the value of the
reference voltage or the output data will be clipped.
The two input signals should be exactly 180° out of phase from each other and of the same amplitude. For single
frequency inputs, angular errors result in a reduction of the effective full scale input. For complex waveforms,
however, angular errors will result in distortion.
Figure 36. Expected Input Signal Range
For single frequency sine waves the full scale error in LSB can be described as approximately
E_FS = 4096 ( 1 - sin (90° + dev))
(5)
Where dev is the angular difference in degrees between the two signals having a 180° relative phase relationship
to each other (see Figure 37). Drive the analog inputs with a source impedance less than 100Ω.
Figure 37. Angular Errors Between the Two Input Signals Will Reduce the Output Level or Cause
Distortion
For differential operation, each analog input pin of the differential pair should have a peak-to-peak voltage equal
to the reference voltage, V_REF, be 180 degrees out of phase with each other and be centered around V_CM.
Single-Ended Operation
Performance with differential input signals is better than with single-ended signals. For this reason, single-ended
operation is not recommended. However, if single ended-operation is required and the resulting performance
degradation is acceptable, one of the analog inputs should be connected to the d.c. mid point voltage of the
driven input. The peak-to-peak differential input signal at the driven input pin should be twice the reference
voltage to maximize SNR and SINAD performance (Figure 36b). For example, set V_REF to 0.5V, bias V_IN− to 1.0V
and drive V_IN+ with a signal range of 0.5V to 1.5V.
Because very large input signal swings can degrade distortion performance, better performance with a single-
ended input can be obtained by reducing the reference voltage when maintaining a full-range output. Table 1 and
Table 2 indicate the input to output relationship of the ADC12DL065.
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